先进逻辑CMOS器件及工艺集成制造，高k/金属栅及多阈值技术

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140100-集成电路科学与工程
080903-微电子学与固体电子学

2015-09--2020-07   中国科学院大学   工学博士
2011-09--2015-06   湖南大学   工学学士

   

2024-05~现在, 中国科学院微电子研究所, 副研究员
2021-01~2024-04,中国科学院微电子研究所, 助理研究员
2021-01~2024-01,中国科学院微电子研究所, 博士后

[1] Y. Yu, et al., Fabricated Parasitic-Interbridge-Free TreeFETs for CMOS Low Power Applications，IEEE Electron Device Letters，2026，通讯作者

[2] Y. Wang, et al., LaOx Atomic Flip Dipole Technique with Single Dipole Shifter in CMOS GAA NSFETs，IEEE Transactions on Electron Devices，2026，通讯作者

[3] Y. Wang, et al., Experiment Investigation of La2O3 Dipole-Last Cap-Less VFB Tuning Technology With Low-Thermal Post Deposition Anneal，IEEE Journal of the Electron Devices Society，2026，通讯作者

[4] Y. Wang, et al., First Demonstration of LaOx Atomic Flip Dipole Technique with Single Dipole Shifter in CMOS GAA NSFETs to Achieve ~66 mV/level Multi-VTs within 330 mV Range，International Electron Devices Meeting (IEDM)，2025，通讯作者

[5] Y. Wei, et al., First Demonstration of 9N+9P Complete Dipole Multi-VTs CMOS Integration with Atomic Interfacial Dipole Buffer Layer Technique in GAA NSFETs，Symposium on VLSI Technology and Circuits（VLSI），2025，通讯作者

[6] Y. Wei, et al., Linear Fine-tuning VFB and Improved Interface via Novel Al2O3 Atomic in-situ Dipole Buffer Layer (DBL) in ALD La2O3 Dipole-first Stack, IEEE Electron Device Letters，2025，通讯作者

[7] Y. Wang, et al., Investigation of TiN/LaOx Interface Dipole Effect on Negative Flat-Band Voltage (VFB) Shift in TiN/LaOx/HfO2/SiO2 Gate Stacks Using Dipole-Last Technology，IEEE Transactions on Electron Devices，2025，通讯作者

[8] X. Zhang, et al., Performance Optimization of Fabricated Nanosheet GAA CMOS Transistors and 6T-SRAM Cells via Source/Drain Doping Engineering，IEEE Journal of the Electron Devices Society，2025，通讯作者

[9] Y. Wei, et al., Experimental Investigation of Inserted HfO2 Impact on VFB and Interface via ALD for La2O3 Dipole-first Multi-VT Techniques，IEEE Electron Devices Technology and Manufacturing Conference (EDTM)，2025，通讯作者

[10] Y. Wang, et al., Experiment Investigation on La2O3 Dipole-last Cap-less VFB Tuning Technology Based on Nitrogen Atmosphere，IEEE Electron Devices Technology and Manufacturing Conference (EDTM)，2025，通讯作者

[11] G. Zhang, et al., Quantum transport for the gate-length scaling limit of Si nanowire field-effect transistors based on calibrated k·p Hamiltonian parameters，Physical Review Applied，2025，第3作者

[12] Y. Wei, et al., Sub-5-Å La2O3 In Situ Dipole Technique for Large VFB Modulation With EOT Reduction and Improved Interface for HKMG Technology，IEEE Transactions on Electron Devices，2024，通讯作者

[13] X. Zhang, et al., Hybrid Integration of Gate-All-Around Stacked Si Nanosheet FET and Si/SiGe Super-Lattice FinFET to Optimize 6T-SRAM for N3 Node and Beyond，IEEE Transactions on Electron Devices，2024，第2作者

[14] P. Wang, et al., Improved Subthreshold Characteristics of Epi-Silicon FinFET via Fin Surface Passivation Technologies，ECS Journal of Solid State Science and Technology，2024，第4作者

[15] F. Zhang, et al., Effects of the VGS sweep range on the short channel effect in negative capacitance FinFETs，Science China Information Sciences，2024，第3作者

[16] F. Zhang, et al., The Investigation of Reduced Variation Effect in FinFETs With Ultrathin 3-nm Ferroelectric Hf0.5Zr0.5O2，IEEE Transactions on Electron Devices，2024，第3作者

[17] Y. Wei, et al., Experimental Investigation of Ultra-Low Temperature La2O3/HfO2 Bi-Layer Dipole-First Process Using PVD Method for Advanced IC Technology，China Semiconductor Technology International Conference (CSTIC)，2023，通讯作者

[18] J. Yao, et al., Leakage Reduction of GAA Stacked Si Nanosheet CMOS Transistors and 6T-SRAM Cell Via Spacer Bottom Footing Optimization，China Semiconductor Technology International Conference (CSTIC)，2023，第1作者

[19] G. Yan, et al., First Demonstration of True 4-bit Memory with Record High Multibit Retention >103s and Read Window >105 by Hydrogen Self-Adaptive-Doping for IGZO DRAM Arrays，International Electron Devices Meeting (IEDM)，2023，第8作者

[20] J. Yao, et al., Record 7(N)+7(P) Multiple VTs Demonstration on GAA Si Nanosheet n/pFETs using WFM-Less Direct Interfacial La/Al-Dipole Technique，International Electron Devices Meeting (IEDM)，2022，第1作者

[21] R. Xu, et al., Experimental Investigation of Ultrathin Al2O3 Ex-Situ Interfacial Doping Strategy on Laminated HKMG Stacks via ALD，IEEE Transactions on Electron Devices，2022，通讯作者

[22] L. Cao, et al., Investigation of Fabricated CMOS FishboneFETs and TreeFETs With Strained SiGe Nano-Fins on Bulk-Si Substrate，IEEE Electron Device Letters，2023，第3作者

[23] J. Gu, et al., Quantum Dot With a Diamond-Shaped Channel MOSFET on a Bulk Si Substrate，IEEE Transactions on Electron Devices，2021, 第4作者

[24] Q. Zhang, et al., Optimization of Structure and Electrical Characteristics for Four-Layer Vertically-Stacked Horizontal Gate-All-Around Si Nanosheets Devices，NANOMATERIALS，2021，第8作者

[25] J. Gu, et al., Cryogenic Transport Characteristics of P-Type Gate-All-Around Silicon Nanowire MOSFETs，NANOMATERIALS，2021，第4作者

[26] J. Yao, et al., Novel Band-Edge Work Function Performance Modulation via NPT with PMOS1st/NMOS1st Laminated Stack for PMOS Low Power Target，ECS Journal of Solid State Science and Technology，2020，第1作者、通讯作者

[27] J. Yao, et al., Comprehensive Investigation of Flat-band Voltage Modulation by High-K NPT for Advanced HKMG Technology，China Semiconductor Technology International Conference (CSTIC)，2019，第1作者

[28] J. Yao, et al., Multi-Vt Performance Dependence on Capping Layer Position by NPT for PMOS Device Applications，ECS Journal of Solid State Science and Technology，2019，第1作者

[29] Z. Hou, et al., Impact of Annealing Temperature on Performance Enhancement for Charge Trapping Memory with (HfO2)0.9(Al2O3)0.1 Trapping Layer，China Semiconductor Technology International Conference (CSTIC)，2019，第2作者

[30] J. Yao, et al., Physical Insights on Quantum Confinement and Carrier Mobility in Si, Si0.45Ge0.55, Ge Gate-All-Around NSFET for 5nm Technology Node，IEEE Journal of the Electron Devices Society，2018，第1作者

[31] J. Yao, et al., Comparative Investigation of Flat-Band Voltage Modulation by Nitrogen Plasma Treatment for Advanced HKMG Technology，ECS Journal of Solid State Science and Technology，2018，第1作者

[32] Z. Hou, et al., Improvement of Operation Characteristics for MONOS Charge Trapping Flash Memory with SiGe Buried Channel, Improvement of Operation Characteristics for MONOS Charge Trapping Flash Memory with SiGe Buried Channel，Chinese Physics Letters，2018，第3作者