发表论文
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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD)[J]. 2023, 第 4 作者[10] Yinhe Han, Haobo Xu, Meixuan Lu, Haoran Wang, Junpei Huang, Ying Wang, Yujie Wang, Feng Min, Qi Liu, Ming Liu, Ninghui Sun. The Big Chip: Challenge, Model and Architecture. FUNDAMENTAL RESEARCH[J]. 2023, 第 6 作者http://dx.doi.org/10.1016/j.fmre.2023.10.020.[11] 王浩然, 许浩博, 王颖, 韩银和. CTA: Hardware-Software Co-design for Compressed Token Attention Mechanism. IEEE International Symposium on High-Performance Computer Architecture(HPCA)). 2023, 第 3 作者 通讯作者 [12] Lv, Hao, Li, Bing, Zhang, Lei, Liu, Cheng, Wang, Ying. Variation Enhanced Attacks Against RRAM-Based Neuromorphic Computing System. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS[J]. 2023, 第 5 作者 通讯作者 42(5): 1588-1596, http://dx.doi.org/10.1109/TCAD.2022.3207316.[13] Erjing Luo, 黄海同, 刘成, 李国宇, Bing Yang, 王颖, 李华伟, 李晓维. DeepBurning-MixQ: An Open Source Mixed-Precision Neural Network Accelerator Design Framework for FPGAs. 2023 IEEE International Conference on Computer-Aided Design (ICCAD). 2023, 第 6 作者null(null): [14] Li, Wen, Wang, Ying, Liu, Cheng, He, Yintao, Liu, Lian, Li, Huawei, Li, Xiaowei. On-Line Fault Protection for ReRAM-Based Neural Networks. IEEE TRANSACTIONS ON COMPUTERS[J]. 2023, 第 2 作者 通讯作者 72(2): 423-437, http://dx.doi.org/10.1109/TC.2022.3160345.[15] 李佳骏, 许浩博, 王郁杰, 肖航, 王颖, 韩银和, 李晓维. 面向高能效加速器的二值化神经网络设计和训练方法. 计算机辅助设计与图形学学报[J]. 2023, 第 5 作者35(6): 961-969, https://www.jcad.cn/article/doi/10.3724/SP.J.1089.2023.19461.[16] Wang, Ying, Jia, WenQing, Jiang, DeJun, Xiong, Jin. A Survey of Non-Volatile Main Memory File Systems. JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY[J]. 2023, 第 1 作者 通讯作者 38(2): 348-372, http://dx.doi.org/10.1007/s11390-023-1054-3.[17] 李苍源, 王颖, 李华伟, 李晓维. APPEND: Rethinking ASIP Synthesis in the Era of AI. 2023 60th ACM/IEEE Design Automation Conference (DAC). 2023, 第 2 作者[18] 褚诚, 刘成, 王颖, 李华伟, 李晓维. Accelerating Deformable Convolution Networks with Dynamic and Irregular Memory Accesses. ACM Transactions on Design Automation of Electronic Systems (TODAES)[J]. 2023, 第 3 作者[19] 薛兴华, 刘成, 刘波, 黄海同, 王颖, 罗涛, 张磊, 李华伟, 李晓维. Exploring Winograd Convolution for Cost-Effective Neural Network Fault Tolerance. IEEE Transactions on Very Large Scale Integration (VLSI) Systems (TVLSI)[J]. 2023, 第 5 作者31(11): 1763-1773, [20] He, Yuquan, Zhang, Long, Liu, Cheng, Zhang, Lei, Wang, Ying. S-2 Loop: A Lightweight Spectral-Spatio Loop Closure Detector for Resource-Constrained Platforms. IEEE ROBOTICS AND AUTOMATION LETTERS[J]. 2023, 第 5 作者 通讯作者 8(3): 1826-1833, http://dx.doi.org/10.1109/LRA.2023.3243809.[21] Chen, Weiwei, Wang, Ying, Xu, Ying, Gao, Chengsi, Liu, Cheng, Zhang, Lei. A Framework for Neural Network Architecture and Compile Co-optimization. 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Processing-in-SRAM Acceleration for Ultra-Low Power Visual 3D Perception. In proceedings of ACM/IEEE Design Automation Conference (DAC). 2022, 第 4 作者 通讯作者 [27] 王颖, 李华伟, 何银涛, Cheng Long, 李晓维. A Fast Precision Tuning Solution for Always-On DNN Accelerators. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS[J]. 2022, 第 1 作者41(5): 1236-1248, [28] Weiwei Chen, Ying Wang, Ying Xu, Chengsi Gao, 韩银和, Lei Zhang. Amphis: Managing Reconfigurable Processor Architectures With Generative Adversarial Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.[J]. 2022, 第 2 作者41(11): [29] He, Zhen, Shi, Cong, Wang, Tengxiao, Wang, Ying, Tian, Min, Zhou, Xichuan, Li, Ping, Liu, Liyuan, Wu, Nanjian, Luo, Gang. A Low-Cost FPGA Implementation of Spiking Extreme Learning Machine With On-Chip Reward-Modulated STDP Learning. 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