发表论文
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IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS[J]. 2023, 第 8 作者 通讯作者 42(5): 1705-1717, http://dx.doi.org/10.1109/TCAD.2022.3191548.[4] Zhang, Bo, Wang, Qi, Wang, Xianliang, Yu, Xiaolei, Li, Qianhui, He, Jing, Huo, Zongliang, Ye, Tianchun. Monitor Units Assisted LDPC Decoding Algorithm based on Page BER Variation of 3D NAND Flash Memory. MICROELECTRONICS RELIABILITY[J]. 2023, 第 2 作者 通讯作者 147: http://dx.doi.org/10.1016/j.microrel.2023.115034.[5] He, Jing, Yu, Xiaolei, Li, Qianhui, Zhang, Bo, Wang, Xianliang, Zhao, Qianqi, Qiang, Xuhong, Wang, Qi, Huo, Zongliang, Ye, Tianchun. DNN-based error level prediction for reducing read latency in 3D NAND flash memory. MICROELECTRONICS RELIABILITY[J]. 2023, 第 8 作者 通讯作者 147: http://dx.doi.org/10.1016/j.microrel.2023.115008.[6] Yang, Liu, Wang, Qi, Li, Qianhui, Yu, Xiaolei, Huo, Zongliang. Reduce Refresh Operations on 3-D TLC nand Flash System via Wordline (WL) Interference. IEEE EMBEDDED SYSTEMS LETTERS[J]. 2022, 第 2 作者 通讯作者 14(4): 179-182, [7] Li, Qianhui, Wang, Qi, Yang, Liu, Yu, Xiaolei, Jiang, Yiyang, He, Jing, Huo, Zongliang. Optimal read voltages decision scheme eliminating read retry operations for 3D NAND flash memories. MICROELECTRONICS RELIABILITY[J]. 2022, 第 11 作者131: http://dx.doi.org/10.1016/j.microrel.2022.114509.[8] Wang, Xianliang, Wang, Qi, Zhang, Bo, He, Jing, Huo, Zongliang. A novel adaptive-refresh scheme to reduce refresh with page endurance variance in 3D TLC NAND flash memories. IEICE ELECTRONICS EXPRESS[J]. 2022, 第 2 作者 通讯作者 19(13): http://dx.doi.org/10.1587/elex.19.20220198.[9] 张宁, 史维华, 王颀, 霍宗亮. 一种适用于3D NAND闪存的分布式功率级LDO设计. 微电子学与计算机[J]. 2022, 第 3 作者39(3): 94-100, http://lib.cqvip.com/Qikan/Article/Detail?id=7107007296.[10] Li, Qianhui, Wang, Qi, Yang, Liu, Jiang, Yiyang, He, Jing, Yu, Xiaolei, Wang, Qianqian, Chen, Ke, Zhang, Bo, Wang, Xianliang, Huo, Zongliang. Read latency decrease schemes based on check node error rate for 3D NAND flash memories*. MICROELECTRONICS RELIABILITY[J]. 2022, 第 2 作者 通讯作者 136: http://dx.doi.org/10.1016/j.microrel.2022.114596.[11] Li, Runze, Tian, Ye, Du, Zhichao, Wang, Yu, Wang, Qi, Huo, Zongliang. A polynomial based valley search algorithm for 3D NAND flash memory. IEICE ELECTRONICS EXPRESS[J]. 2022, 第 5 作者19(6): http://dx.doi.org/10.1587/elex.19.20210535.[12] Cao, H M, Liu, F, Wang, Q, Du, Z C, Jin, L, Huo, Z L. An efficient built-in error detection methodology with fast page-oriented data comparison in 3D NAND flash memories. ELECTRONICS LETTERS[J]. 2022, 58(12): 483-485, http://dx.doi.org/10.1049/ell2.12484.[13] Yang, Liu, Wang, Qi, Li, Qianhui, He, Jing, Huo, Zongliang. Retention failure recovery technique for 3D TLC NAND flash memory via wordline (WL) interference. SOLID-STATE ELECTRONICS[J]. 2022, 第 2 作者194: http://dx.doi.org/10.1016/j.sse.2022.108299.[14] Du, Zhichao, Dong, Zhipeng, You, Kaikai, Jia, Xinlei, Tian, Ye, Wang, Yu, Yang, Zhaochun, Fu, Xiang, Liu, Fei, Wang, Qi, Jin, Lei, Huo, Zongliang. A Novel Program Suspend Scheme for Improving the Reliability of 3D NAND Flash Memory. IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY[J]. 2022, 第 10 作者10: 98-103, http://dx.doi.org/10.1109/JEDS.2022.3140949.[15] Cao, Huamin, Wang, Qi, Liu, Fei, Huo, Zongliang. A Novel Plane-Based Control Bus Design with Distributed Registers in 3D NAND Flash Memories. CHINESE JOURNAL OF ELECTRONICS[J]. 2022, 第 2 作者31(4): 647-651, [16] Du, Zhichao, Li, Shuang, Wang, Yu, Fu, Xiang, Liu, Fei, Wang, Qi, Huo, Zongliang. Adaptive Pulse Programming Scheme for Improving the V-th Distribution and Program Performance in 3D NAND Flash Memory. IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY[J]. 2021, 第 6 作者9: 102-107, http://dx.doi.org/10.1109/JEDS.2020.3041088.[17] Jiang, Yiyang, Wang, Qi, Li, Qianhui, Huo, Zongliang. Multi-Coding ECC Algorithm Based on 3D Charge Trap NAND Flash Hot Region Cell Prediction. IEEE COMMUNICATIONS LETTERS[J]. 2020, 第 2 作者24(2): 244-248, https://www.webofscience.com/wos/woscc/full-record/WOS:000519909600003.[18] 张明明, 王颀, 井冲, 霍宗亮. 3D NAND闪存数据保持力与初始状态依赖性研究. 电子学报[J]. 2020, 第 2 作者48(2): 314-320, http://lib.cqvip.com/Qikan/Article/Detail?id=7101331713.[19] 张玺, 王颀, 童炜, 霍宗亮. 一种用于三维闪存测试的低成本PMU电路. 微电子学与计算机[J]. 2020, 第 2 作者37(5): 1-5, http://lib.cqvip.com/Qikan/Article/Detail?id=7101853376.[20] 王美兰, 王颀, 陈振家, 刘志, 张桔萍, 霍宗亮. 3D NAND Flash的片上控制逻辑电路设计. 微电子学与计算机[J]. 2019, 第 2 作者36(6): 31-34,39, http://lib.cqvip.com/Qikan/Article/Detail?id=7002218487.[21] Li, Qianhui, Wang, Qi, Xu, Qikang, Huo, Zongliang. A fast read retry method for 3D NAND flash memories using novel valley search algorithm. IEICE ELECTRONICS EXPRESS[J]. 2018, 第 2 作者 通讯作者 15(22): https://www.webofscience.com/wos/woscc/full-record/WOS:000452489800008.[22] 陈珂, 杜智超, 叶松, 王颀, 霍宗亮. 基于一种NAND闪存页缓存器设计的C/F读取算法研究. 电子学报[J]. 2018, 第 4 作者46(11): 2619-2625, http://lib.cqvip.com/Qikan/Article/Detail?id=7000937963.[23] Yang, Liu, Liu, Fei, Cao, Huamin, Wang, Qi, Huo, Zongliang. Word line interference based data recovery technique for 3D NAND Flash. IEICE ELECTRONICS EXPRESS[J]. 2018, 第 4 作者15(19): https://www.webofscience.com/wos/woscc/full-record/WOS:000449730000010.[24] Liyin Fu, Teng Chen, Cece Huang, Zongliang Huo, Yu Wang, Qi Wang. A 1.2 mV ripple, 4.5 V charge pump using controllable pumping current technology. DENSHI JOUHOU TSUUSHIN GAKKAI. 2017, 第 6 作者http://oa.las.ac.cn/oainone/service/browseall/read1?ptype=JA&workid=JA201902190470369ZK.[25] Peng, Junli, Wang, Qi, Fu, Xiang, Huo, Zongliang. Dynamic LLR scheme based on EM algorithm for LDPC decoding in NAND flash memory. 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