VLSI Testing, EDA, Fault-Tolerant Computing, Hardware Security

1991/09-1993/08  Peking University, Dept. of Computer Science, Postdoctorial Researcher

1988/09-1991/07  Ph.D. Graduate Student, University of Chinese Academy of Sciences (ICT, CAS)

1985/09-1988/07  M.S. Graduate Student, Hefei University of Technology, Dept. of Computer and Information 

1981/09-1985/07  B.S. Undergraduate Student, Hefei University of Technology, Dept. of Electrical Engineering 

‍‍‍‍Chairman, Board of Supervisors of China Computer Federation (CCF, 2020-2024)

Vice-Chair, IEEE CS Test Technology Technical Council (TTTC) (2018-2019) 

Chair, Steering Committee of IEEE Asian Test Symposium (2011-2013)

Associate Editor-in-Chief, Journal of Computer Science and Technology (JCST, 2009-present)

Associate Editor, IEEE Transactions on CAD of IC & Systems (2018-2022) 

Associate Editor, IEEE Transactions on Circuit and Systems II: Express Briefs (2020-2023) 

Associate Editor, Journal of Electronic Testing (JETTA, 2009-present)

Associate Editor, Journal of Low-Power Electronics (JOLPE, 2009-present)‍‍‍‍

2011/11 to present, Deputy (Executive) Director, State Key Lab of Computer Architecture (ICT, CAS)

2004/09 to present, Vice Driector, Academic Degree Evaluation Committee, ICT, CAS

2004/09 to present, Professor, University of Chinese Academy of Sciences

2000/09 to present, Professor, Institute of Computing Technology, Chinese Academy of Sciences

1993/09 to 2000/08, Associate Professor, Dept of Computer Science, Peking University

1999/07 to 2000/02, Visiting Research Fellow, Nara Advanced Institute of Science and Technology, Japan

1997/01 to 1999/01, Visiting Research Fellow, Dept of EEE, University of Hong Kong

Graduate Course: VLSI Testing and Design for Testability

Graduate Course: Fault Tolerant Computing

China National Technology Innovation Award (2012)

China National Science and Technology Progress Award (2015).