发表论文
[1] Ya Hai, Fei Liu, Yongshan Wang, Liyin Fu, Jian Huo. A wide-frequency and high-precision ZQ calibration circuit for NAND Flash memory. MICROELECTRONICS JOURNAL. 2024, 第 2 作者 通讯作者 143: http://dx.doi.org/10.1016/j.mejo.2023.106051.[2] Hai, Ya, Liu, Fei, Wang, Yongshan, Kang, Jing. An all-digital built-in-self-test scheme for duty cycle corrector with de-skew circuit in NAND Flash memory. MICROELECTRONICS JOURNAL[J]. 2023, 第 2 作者 通讯作者 141: http://dx.doi.org/10.1016/j.mejo.2023.105947.[3] Hai, Ya, Liu, Fei, Wang, Yongshan, Kang, Jing. A small-area and low-power all-digital duty cycle corrector with de-skew circuit. ELECTRONICS LETTERS[J]. 2023, 第 2 作者 通讯作者 59(8): http://dx.doi.org/10.1049/ell2.12793.[4] Kang, Jing, Liu, Fei, Hai, Ya, Wang, Yongshan. A Wide-Range Four-Phase All-Digital DLL with De-Skew Circuit. ELECTRONICS[J]. 2023, 第 2 作者 通讯作者 12(7): http://dx.doi.org/10.3390/electronics12071610.[5] Wang, Qianqian, Liu, Fei, Fu, Liyin, Li, Qianhui, Kang, Jing, Chen, Ke, Huo, Zongliang. A 22.3-Bit Third-Order Delta-Sigma Modulator for EEG Signal Acquisition Systems. ELECTRONICS[J]. 2023, 第 2 作者 通讯作者 12(23): http://dx.doi.org/10.3390/electronics12234866.[6] 杨雪, 刘飞, 霍宗亮. 一种宽范围、高精度的带宽自适应式四相DLL. 西安电子科技大学学报[J]. 2022, 第 2 作者 通讯作者 49(1): 194-201, http://lib.cqvip.com/Qikan/Article/Detail?id=7107024434.[7] Huang, Cece, Liu, Fei, Wang, Qianqian, Huo, Zongliang. Low Power Program Scheme With Capacitance-Less Charge Recycling for 3D NAND Flash Memory. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS[J]. 2021, 第 2 作者 通讯作者 68(7): 2478-2482, http://dx.doi.org/10.1109/TCSII.2021.3051058.[8] Song, Biruo, Liu, Hongtao, Jin, Lei, Fu, Xiang, Liu, Fei, Huo, Zongliang. Impact of stacking layers on RTN in 3D charge trapping NAND flash memory. MICROELECTRONICS RELIABILITY[J]. 2021, 第 5 作者127: http://dx.doi.org/10.1016/j.microrel.2021.114415.[9] Wang, Qianqian, Liu, Fei, Huang, Cece, Li, Qianhui, Huo, Zongliang. A Small Ripple and High-Efficiency Wordline Voltage Generator for 3-D nand Flash Memories. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS[J]. 2021, 第 2 作者 通讯作者 29(11): 1903-1911, http://dx.doi.org/10.1109/TVLSI.2021.3113980.[10] Du, Zhichao, Li, Shuang, Wang, Yu, Fu, Xiang, Liu, Fei, Wang, Qi, Huo, Zongliang. Adaptive Pulse Programming Scheme for Improving the V-th Distribution and Program Performance in 3D NAND Flash Memory. IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY[J]. 2021, 第 5 作者9: 102-107, http://dx.doi.org/10.1109/JEDS.2020.3041088.[11] Huang, Cece, Liu, Fei, Wang, Qianqian, Huo, Zongliang. A Small Ripple Program Voltage Generator Without High-Voltage Regulator for 3D NAND Flash. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS[J]. 2020, 第 2 作者 通讯作者 67(6): 1049-1053, http://dx.doi.org/10.1109/TCSII.2019.2923730.[12] Yin, Tao, Xin, Fubin, Li, Fanyang, Liu, Fei, Yang, Haigang. A hybrid Sigma-Delta modulator with reusable SAR quantizer. IEICE ELECTRONICS EXPRESS[J]. 2019, 第 4 作者16(3): https://www.webofscience.com/wos/woscc/full-record/WOS:000459383900012.[13] Wang Qianqian, Liu Fei, Huang Cece, Fu Liyin, Huo Zongliang, Jiang YL, Tang TA, Ye F. A 12 V Low-Ripple and High-Efficiency Charge Pump with Continuous Regulation Scheme for 3D NAND Flash Memories. 2018 14TH IEEE INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT). 2018, 第 11 作者1181-1183, http://apps.webofknowledge.com/CitedFullRecord.do?product=UA&colName=WOS&SID=5CCFccWmJJRAuMzNPjj&search_mode=CitedFullRecord&isickref=WOS:000458919700352.[14] Yang, Liu, Liu, Fei, Cao, Huamin, Wang, Qi, Huo, Zongliang. Word line interference based data recovery technique for 3D NAND Flash. IEICE ELECTRONICS EXPRESS[J]. 2018, 第 2 作者 通讯作者 15(19): https://www.webofscience.com/wos/woscc/full-record/WOS:000449730000010.[15] 杨元龙, 刘飞, 辛福彬, 黄国城, 尹韬, 杨海钢. 一种基于SAR量化器的低功耗音频Δ-Σ调制器. 微电子学[J]. 2016, 第 2 作者46(1): 45-49,53, http://microelec.ijournals.cn/wdzx/article/abstract/20160112?st=article_issue.[16] 辛福彬, 刘飞, 杨元龙, 尹韬, 杨海钢. 一种精度可编程的低功耗SAR ADC. 微电子学[J]. 2016, 第 2 作者46(2): 159-164, http://microelec.ijournals.cn/wdzx/article/abstract/20160204?st=article_issue.[17] 解俊杰, 杨雅娟, 刘飞, 杨海钢, 韦援丰, 王峰. 一种自参考的可变分辨率片上抖动测量系统. 微电子学与计算机[J]. 2015, 第 3 作者32(11): 33-39,45, https://d.wanfangdata.com.cn/periodical/wdzxyjsj201511008.[18] Zhu, Wenrui, Yang, Haigang, Gao, Tongqiang, Liu, Fei, Yin, Tao, Zhang, Dandan, Zhang, Hongfeng. A 5.8-GHz Wideband TSPC Divide-by-16/17 Dual Modulus Prescaler. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS[J]. 2015, 第 4 作者23(1): 194-197, https://www.webofscience.com/wos/woscc/full-record/WOS:000348377200018.[19] Xin Fubin, Yin Tao, Wu Qisong, Yang Yuanlong, Liu Fei, Yang Haigang. A low power 12-bit 1 Msps successive approximation register ADC with an improved switching procedure. JOURNAL OF SEMICONDUCTORS[J]. 2015, 第 5 作者36(8): 085007-01, [20] Cheng Xiaoyan, Yang Haigang, Yin Tao, Wu Qisong, Zhi Tian, Liu Fei. MIXED-GRAINED CMOS FIELD PROGRAMMABLE ANALOG ARRAY FOR SMART SENSORY APPLICATIONS. 电子科学学刊:英文版[J]. 2014, 第 6 作者129-142, http://lib.cqvip.com/Qikan/Article/Detail?id=49435008.[21] Wang, Xiaoyu, Yang, Haigang, Li, Fanyang, Yin, Tao, Huang, Guocheng, Liu, Fei. A programmable analog hearing aid system-on-chip with frequency compensation. ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING[J]. 2014, 第 6 作者79(2): 227-236, [22] Wenrui zhu Haigang Yang Gao Tongqiang Fei LiuXiaoyan Chen and Dandan Zhang. A baseband circuit for wake-up receivers with double-mode detection and enhanced sensitivity robustness. JOURNAL OF SEMICONDUCTORS[J]. 2013, 34(8): 085011-1, http://159.226.65.12/handle/80137/10226.[23] Ye, Zhenhua, Yang, Haigang, Yin, Tao, Huang, Guocheng, Liu, Fei. High-Performance Closed-Loop Interface Circuit for High-Q Capacitive Microaccelerometers. IEEE SENSORS JOURNAL[J]. 2013, 第 5 作者13(5): 1425-1433, http://159.226.65.12/handle/80137/10229.[24] Zhu Wenrui, Zhang Dandan, Gao Tongqiang, Liu Fei, Yang Haigang. A 2.1 μA WAKE-UP CIRCUIT FOR CHINESE ETC SYSTEM. 电子科学学刊:英文版[J]. 2013, 第 4 作者308-312, http://lib.cqvip.com/Qikan/Article/Detail?id=46234950.[25] 杨海钢. A 1.4-V 48-mW current-mode front-end circuit for analog hearing aids with frequency compensation. Journal of Semiconductors. 2012, [26] 叶珍华, 杨海钢, 李凡阳, 程小燕, 尹韬, 刘飞. 大电容负载下的高速、低功耗动态摆率增强电路研究. 微电子学与计算机[J]. 2012, 第 6 作者29(12): 75-79, http://sciencechina.cn/gw.jsp?action=detail.jsp&internal_id=4714382&detailType=1.[27] Wang Yu, Yang Haigang, Yin Tao, Liu Fei. A 12-bit,40-Ms/s pipelined ADC with an improved operational amplifier. 半导体学报[J]. 2012, 第 4 作者33(5): 055004-1, http://lib.cqvip.com/Qikan/Article/Detail?id=41934126.[28] Wang Xiaoyu, Yang Haigang, Li Fanyang, Yin Tao, Liu Fei. A 1.4-V 48-μW current-mode front-end circuit for analog hearing aidswith frequency compensation. JOURNAL OF SEMICONDUCTORS[J]. 2012, 第 5 作者33(10): 105004-1, http://sciencechina.cn/gw.jsp?action=detail.jsp&internal_id=4701987&detailType=1.[29] 叶珍华, 杨海钢, 尹韬, 刘飞. 开关电容式闭环微加速度计的稳定性研究. 电子与信息学报[J]. 2012, 第 4 作者34(9): 2254-2258, https://jeit.ac.cn/cn/article/doi/10.3724/SP.J.1146.2012.00077.[30] 王瑜, 杨海钢, 尹韬, 刘飞. A 12-bit, 40-Ms/s pipelined ADC with an improved operational amplifier. JOURNAL OF SEMICONDUCTORS[J]. 2012, 第 4 作者33(5): 105-112, http://lib.cqvip.com/Qikan/Article/Detail?id=41934126.[31] Xu Long, Liu Fei, Yang Haigang, Tang TA, Jiang YL. A 90-mu W 16 Bit 20 KHz-BW Feedforward Double-sampled Sigma-Delta Modulator in 0.18 CMOS. 2012 IEEE 11TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT-2012). 2012, 第 2 作者1005-1007, http://apps.webofknowledge.com/CitedFullRecord.do?product=UA&colName=WOS&SID=5CCFccWmJJRAuMzNPjj&search_mode=CitedFullRecord&isickref=WOS:000319824700284.[32] Wang Yu, Yang Haigang, Cheng Xin, Liu Fei, Yin Tao. A FAST FOREGROUND DIGITAL CALIBRATION TECHNIQUE FOR PIPELINED ADC. 电子科学学刊:英文版[J]. 2012, 第 4 作者29(5): 445-450, http://lib.cqvip.com/Qikan/Article/Detail?id=43213429.[33] 王晓宇, 杨海钢, 尹韬, 刘飞, 李凡阳. 低压低功耗阶跃增益对数域电流模滤波器的状态空间设计方法. 微电子学与计算机[J]. 2012, 第 4 作者29(7): 18-22, http://lib.cqvip.com/Qikan/Article/Detail?id=42555259.[34] Li, Fanyang, Yang, Haigang, Liu, Fei, Yin, Tao, Wang, Xiaoyu. Dual-mode gain control for a 1 V CMOS hearing aid device with enhanced accuracy and energy-efficiency. ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING[J]. 2012, 第 3 作者72(2): 495-504, [35] 李凡阳, 杨海钢, 刘飞, 尹幍. A current mode feed-forward gain control system for a 0.8 V CMOS hearing aid. 半导体学报[J]. 2011, 第 3 作者32(6): 126-131, http://lib.cqvip.com/Qikan/Article/Detail?id=38149216.[36] 陈柱佳, 杨海钢, 刘飞, 王瑜. A fast-locking all-digital delay-locked loop for phase/delay generation in an FPGA. 半导体学报[J]. 2011, 第 3 作者32(10): 105001-1, http://lib.cqvip.com/Qikan/Article/Detail?id=39451816.[37] Hui Zhang, 杨海钢, Fei Liu. Start-up Analysis for Differential Ring Oscillator with Even Number of Stages. 2010 IEEE Asia Pacific Conference on Circuits and Systems(APCCAS ). 2011, 第 3 作者http://159.226.65.12/handle/80137/7223.[38] Li Fanyang, Yang Haigang, Liu Fei. A current mode feedforward gain control system for 0.8V CMOS hearing aid. CHINESE JOURNAL OF SEMICONDUCTORS[J]. 2011, 第 3 作者33(2): 065010-1~6, http://159.226.65.12/handle/80137/9662.[39] Zhang Hui, Yang Haigang, Wang Yu, Liu Fei, Gao Tongqiang. A 270-MHz to 1.5-GHz CMOS PLL clock generator with reconfigurable multi-functions for FPGA. 半导体学报[J]. 2011, 第 4 作者32(4): 045010-1, http://lib.cqvip.com/Qikan/Article/Detail?id=37388650.[40] Zhang Hui, Yang Haigang, Wang Yu. A 270-MHz to 1.5-GHz CMOS PLL Clock Generator with Reconfigurable Multi-functions for FPGA. CHINESE JOURNAL OF SEMICONDUCTORS[J]. 2011, 33(2): 045010-1~6, http://159.226.65.12/handle/80137/9660.[41] Wang Yu, Liu Fei, Chen Zhujia, Yang Haigang. A fast-locking all-digital delay-locked loop for phase/delay generation in an FPGA. 半导体学报[J]. 2011, 第 2 作者32(10): 105001-1, http://lib.cqvip.com/Qikan/Article/Detail?id=39451816.[42] 张辉, 杨海钢, 周发标, 刘飞, 高同强. 偶数级差分环形振荡器的稳定平衡态分析. 电子与信息学报[J]. 2011, 第 4 作者33(8): 1969-1974, https://jeit.ac.cn/cn/article/doi/10.3724/SP.J.1146.2010.01386.[43] 程心, 钟伦贵, 杨海钢, 刘飞, 高同强. A pseudo differential Gm-C complex filter with frequency tuning for IEEE802.15.4 applications. 半导体学报[J]. 2011, 第 4 作者32(7): 89-96, http://lib.cqvip.com/Qikan/Article/Detail?id=38465883.[44] 张辉, 杨海钢, 王瑜, 刘飞, 高同强. A 270-MHz to 1.5-GHz CMOS PLL clock generator with reconfigurable multi-functions for FPGA. 半导体学报[J]. 2011, 第 4 作者32(4): 045010-1, http://lib.cqvip.com/Qikan/Article/Detail?id=37388650.[45] Li Fanyang, Yang Haigang, Liu Fei, Yin Tao. A current mode feed-forward gain control system for a 0.8 V CMOS hearing aid. 半导体学报[J]. 2011, 第 3 作者32(6): 065010-1, http://lib.cqvip.com/Qikan/Article/Detail?id=38149216.[46] 钟伦贵, 杨海钢, 刘飞. 基于伪差分结构跨导器的Gm-C复数滤波器设计. 中国科学院研究生院学报[J]. 2011, 第 3 作者28(2): 235-240, http://lib.cqvip.com/Qikan/Article/Detail?id=36886852.[47] Chen Zhujia, Yang Haigang, Liu Fei. A Fast-locking All-digital Delay-locked Loop for Phase/Delay Generation in an FPGA. CHINESE JOURNAL OF SEMICONDUCTORS[J]. 2011, 第 3 作者33(2): 105009-1~8, http://159.226.65.12/handle/80137/9667.[48] 钟伦贵, 杨海钢, 刘飞, 高同强, 张辉. 一种适用于IEEE802.15.4协议的全集成CMOS复数滤波器. 电子与信息学报[J]. 2010, 第 3 作者32(11): 2740-2745, https://jeit.ac.cn/cn/article/doi/10.3724/SP.J.1146.2009.01495.[49] 刘飞, 贾嵩, 卢振庭, 吉利久, 刘凌. 带主从式T/H电路的折叠插值A/D转换器. 半导体学报[J]. 2004, 第 1 作者25(4): 462-467, http://lib.cqvip.com/Qikan/Article/Detail?id=9646064.[50] 贾嵩, 刘飞, 刘凌, 陈中建, 吉利久. 对数跳跃加法器的静态CMOS实现. 半导体学报[J]. 2003, 第 2 作者24(11): 1159-1165, http://lib.cqvip.com/Qikan/Article/Detail?id=8525626.[51] Jia, S, Liu, F, Ji, LJ. Improved Domino logic for high speed design. ELECTRONICS LETTERS[J]. 2003, 39(8): 644-645, https://www.webofscience.com/wos/woscc/full-record/WOS:000182656400006.[52] Jia Song, Liu Fei, Liu Ling, Chen Zhongjian, Ji Lijiu. Static CMOS Implementation of Logarithmic Skip Adder. CHINESE JOURNAL OF SEMICONDUCTORS[J]. 2003, 第 2 作者24(11): 1159-1165, http://sciencechina.cn/gw.jsp?action=detail.jsp&internal_id=1235957&detailType=1.[53] 贾嵩, 刘飞, 刘凌, 陈中建, 吉利久. 对数跳跃加法器的算法及结构设计. 电子学报[J]. 2003, 第 2 作者31(8): 1186-1189, http://lib.cqvip.com/Qikan/Article/Detail?id=8292879.[54] 王钊, 刘飞, 吉利久. 新型双环路电流型压控振荡器. 半导体学报[J]. 2002, 第 2 作者23(3): 305-310, http://lib.cqvip.com/Qikan/Article/Detail?id=6061509.[55] 刘飞, 吉利久. 150Ms/s,6bit CMOS数字工艺折叠、电流插值A/D转换器. 半导体学报[J]. 2002, 第 1 作者23(9): 988-995, http://lib.cqvip.com/Qikan/Article/Detail?id=6925896.[56] Ya Hai, Fei Liu, Yongshan Wang, Jing Kang. An all-digital built-in-self-test scheme for duty cycle corrector with de-skew circuit in NAND Flash memory. MICROELECTRONICS JOURNAL. 第 2 作者 通讯作者 http://dx.doi.org/10.1016/j.mejo.2023.105947.