发表论文
(1) A wide-frequency and high-precision ZQ calibration circuit for NAND Flash memory, MICROELECTRONICS JOURNAL, 2024, 第 2 作者 通讯作者(2) A wide-frequency all-digital duty cycle corrector with self-adaptive configurable delay chain, IEICE Electronics Express, 2023, 第 2 作者 通讯作者(3) An all-digital built-in-self-test scheme for duty cycle corrector with de-skew circuit in NAND Flash memory, MICROELECTRONICS JOURNAL, 2023, 第 2 作者 通讯作者(4) A small-area and low-power all-digital duty cycle corrector with de-skew circuit, ELECTRONICS LETTERS, 2023, 第 2 作者 通讯作者(5) A Wide-Range Four-Phase All-Digital DLL with De-Skew Circuit, ELECTRONICS, 2023, 第 2 作者 通讯作者(6) A 22.3-Bit Third-Order Delta-Sigma Modulator for EEG Signal Acquisition Systems, ELECTRONICS, 2023, 第 2 作者 通讯作者(7) A Novel Program Suspend Scheme for Improving the Reliability of 3D NAND Flash Memory, IEEE Journal of the Electron Devices Society, 2022, 第 9 作者(8) 一种宽范围、高精度的带宽自适应式四相DLL, Wide-range and high-accuracy four-phase DLL with the adaptive-bandwidth scheme, 西安电子科技大学学报, 2022, 第 2 作者 通讯作者(9) Low Power Program Scheme With Capacitance-Less Charge Recycling for 3D NAND Flash Memory, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2021, 第 2 作者 通讯作者(10) Impact of stacking layers on RTN in 3D charge trapping NAND flash memory, MICROELECTRONICS RELIABILITY, 2021, 第 5 作者(11) A Small Ripple and High-Efficiency Wordline Voltage Generator for 3-D nand Flash Memories, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2021, 第 2 作者 通讯作者(12) Adaptive Pulse Programming Scheme for Improving the V-th Distribution and Program Performance in 3D NAND Flash Memory, IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY, 2021, 第 5 作者(13) A Small Ripple Program Voltage Generator Without High-Voltage Regulator for 3D NAND Flash, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2020, 第 2 作者 通讯作者(14) A hybrid Sigma-Delta modulator with reusable SAR quantizer, IEICE ELECTRONICS EXPRESS, 2019, 第 4 作者(15) A 12 V Low-Ripple and High-Efficiency Charge Pump with Continuous Regulation Scheme for 3D NAND Flash Memories, 2018 14TH IEEE INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT), 2018, 第 2 作者 通讯作者(16) Word line interference based data recovery technique for 3D NAND Flash, IEICE ELECTRONICS EXPRESS, 2018, 第 2 作者 通讯作者(17) 一种基于SAR量化器的低功耗音频Δ-Σ调制器, A Low-Power Audio Delta-Sigma Modulator Using SAR Quantizer, 微电子学, 2016, 第 2 作者(18) 一种精度可编程的低功耗SAR ADC, A Low Power SAR ADC with Reconfigurable Resolution, 微电子学, 2016, 第 2 作者(19) 一种自参考的可变分辨率片上抖动测量系统, A Variable Resolution On-Chip Jitter Measurement System Using Self-Referred Architecture, 微电子学与计算机, 2015, 第 3 作者(20) A 5.8-GHz Wideband TSPC Divide-by-16/17 Dual Modulus Prescaler, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2015, 第 4 作者(21) A low power 12-bit 1 Msps successive approximation register ADC with an improved switching procedure, JOURNAL OF SEMICONDUCTORS, 2015, 第 5 作者(22) MIXED-GRAINED CMOS FIELD PROGRAMMABLE ANALOG ARRAY FOR SMART SENSORY APPLICATIONS, MIXED-GRAINED CMOS FIELD PROGRAMMABLE ANALOG ARRAY FOR SMART SENSORY APPLICATIONS, 电子科学学刊:英文版, 2014, 第 6 作者(23) A programmable analog hearing aid system-on-chip with frequency compensation, ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2014, 第 6 作者(24) A Baseband Circuit for Wake-up Receivers with Double-mode Detection and Enhanced Sensitivity Robustness, JOURNAL OF SEMICONDUCTORS, 2013, (25) High-Performance Closed-Loop Interface Circuit for High-Q Capacitive Microaccelerometers, IEEE SENSORS JOURNAL, 2013, 第 5 作者(26) A 2.1 μA WAKE-UP CIRCUIT FOR CHINESE ETC SYSTEM, A 2.1 ��A WAKE-UP CIRCUIT FOR CHINESE ETC SYSTEM, 电子科学学刊:英文版, 2013, 第 4 作者(27) A 1.4-V 48-mW current-mode front-end circuit for analog hearing aids with frequency compensation, Journal of Semiconductors, 2012, (28) 大电容负载下的高速、低功耗动态摆率增强电路研究, A Universal High-Speed��� Low-Power Dynamic Slew-Rate Enhancement Circuit for Large Capacitancer, 微电子学与计算机, 2012, 第 6 作者(29) A 12-bit,40-Ms/s pipelined ADC with an improved operational amplifier, A 12-bit,40-Ms/s pipelined ADC with an improved operational amplifier, 半导体学报, 2012, 第 4 作者(30) A 1.4-V 48-��W current-mode front-end circuit for analog hearing aidswith frequency compensation, JOURNAL OF SEMICONDUCTORS, 2012, 第 5 作者(31) 开关电容式闭环微加速度计的稳定性研究, Stability Analysis of Switched-capacitor Closed-loop Micro-accelerometers, 电子与信息学报, 2012, 第 4 作者(32) A 12-bit,40-Ms/s pipelined ADC with an improved operational amplifier, A 12-bit,40-Ms/s pipelined ADC with an improved operational amplifier, JOURNAL OF SEMICONDUCTORS, 2012, 第 4 作者(33) A 90-mu W 16 Bit 20 KHz-BW Feedforward Double-sampled Sigma-Delta Modulator in 0.18 CMOS, 2012 IEEE 11TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT-2012), 2012, 第 2 作者(34) A FAST FOREGROUND DIGITAL CALIBRATION TECHNIQUE FOR PIPELINED ADC, A FAST FOREGROUND DIGITAL CALIBRATION TECHNIQUE FOR PIPELINED ADC, 电子科学学刊:英文版, 2012, 第 4 作者(35) 低压低功耗阶跃增益对数域电流模滤波器的状态空间设计方法, A Matrix Approach to the Design of Low-Voltage Low-Power Log-Domain Current-Mode Step-Gain Filter, 微电子学与计算机, 2012, 第 4 作者(36) Dual-mode gain control for a 1 V CMOS hearing aid device with enhanced accuracy and energy-efficiency, ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2012, 第 3 作者(37) A current mode feed-forward gain control system for a 0.8 V CMOS hearing aid, A current mode feed-forward gain control system for a 0.8 V CMOS hearing aid, 半导体学报, 2011, 第 3 作者(38) A fast-locking all-digital delay-locked loop for phase/delay generation in an FPGA, A fast-locking all-digital delay-locked loop for phase/delay generation in an FPGA, 半导体学报, 2011, 第 3 作者(39) Start-up Analysis for Differential Ring Oscillator with Even Number of Stages, 2010 IEEE Asia Pacific Conference on Circuits and Systems(APCCAS ), 2011, 第 3 作者(40) A current mode feedforward gain control system for 0.8V CMOS hearing aid, CHINESE JOURNAL OF SEMICONDUCTORS, 2011, 第 3 作者(41) A 270-MHz to 1.5-GHz CMOS PLL clock generator with reconfigurable multi-functions for FPGA, A 270-MHz to 1.5-GHz CMOS PLL clock generator with reconfigurable multi-functions for FPGA, 半导体学报, 2011, 第 4 作者(42) A 270-MHz to 1.5-GHz CMOS PLL Clock Generator with Reconfigurable Multi-functions for FPGA, CHINESE JOURNAL OF SEMICONDUCTORS, 2011, (43) A fast-locking all-digital delay-locked loop for phase/delay generation in an FPGA, A fast-locking all-digital delay-locked loop for phase/delay generation in an FPGA, 半导体学报, 2011, 第 2 作者(44) 偶数级差分环形振荡器的稳定平衡态分析, Stable Equilibrium State Analysis of the Differential Ring Oscillator with Even Number of Stages, 电子与信息学报, 2011, 第 4 作者(45) A pseudo differential Gm-C complex filter with frequency tuning for IEEE802.15.4 applications, A pseudo differential Gm-C complex filter with frequency tuning for IEEE802.15.4 applications, 半导体学报, 2011, 第 4 作者(46) A 270-MHz to 1.5-GHz CMOS PLL clock generator with reconfigurable multi-functions for FPGA, A 270-MHz to 1.5-GHz CMOS PLL clock generator with reconfigurable multi-functions for FPGA, 半导体学报, 2011, 第 4 作者(47) A current mode feed-forward gain control system for a 0.8 V CMOS hearing aid, A current mode feed-forward gain control system for a 0.8 V CMOS hearing aid, 半导体学报, 2011, 第 3 作者(48) 基于伪差分结构跨导器的Gm-C复数滤波器设计, Design of a Gm-C complex filter based on a simple frequency tuning circuit, 中国科学院研究生院学报, 2011, 第 3 作者(49) A Fast-locking All-digital Delay-locked Loop for Phase/Delay Generation in an FPGA, CHINESE JOURNAL OF SEMICONDUCTORS, 2011, 第 3 作者(50) 一种适用于IEEE802.15.4协议的全集成CMOS复数滤波器, A Fully Integrated CMOS Complex Filter for IEEE802.15.4 Standard, 电子与信息学报, 2010, 第 3 作者(51) 带主从式T/H电路的折叠插值A/D转换器, A Folding and Interpolating A/D Converter with Master-Slave T/H Circuit, 半导体学报, 2004, 第 1 作者(52) 对数跳跃加法器的静态CMOS实现, 半导体学报, 2003, 第 2 作者(53) Improved Domino logic for high speed design, ELECTRONICS LETTERS, 2003, (54) 对数跳跃加法器的表态CMOS实现, Static CMOS Implementation of Logarithmic Skip Adder, CHINESE JOURNAL OF SEMICONDUCTORS, 2003, 第 2 作者(55) 对数跳跃加法器的算法及结构设计, Algorithm and Structure Design of Logarithmic Skip Adder, 电子学报, 2003, 第 2 作者(56) 新型双环路电流型压控振荡器, A Novel Dual-Path Current-Mode Voltage Controlled Oseillator, 半导体学报, 2002, 第 2 作者(57) 150Ms/s,6bit CMOS数字工艺折叠、电流插值A/D转换器, 150Ms/s���6bit Digital CMOS Folding A/D Converter with Current-Mode Interpolating, 半导体学报, 2002, 第 1 作者(58) An all-digital built-in-self-test scheme for duty cycle corrector with de-skew circuit in NAND Flash memory, MICROELECTRONICS JOURNAL, 第 2 作者 通讯作者