基本信息

徐昊  男    中国科学院微电子研究所
电子邮件: xuhao@ime.ac.cn
通信地址: 北京市朝阳区北土城西路3号

研究领域

主要研究氧化铪基铁电器件技术,感兴趣的课题包括氧化铪基铁电材料特性调控、铁电晶体管可靠性表征与建模等。

招生信息


招生专业
140100-集成电路科学与工程
招生方向
氧化铪基铁电器件技术

教育背景

2013-08--2016-07   中国科学院微电子研究所   微电子学与固体电子学工学博士学位
2010-08--2013-06   中国科学院微电子研究所   集成电路工程硕士学位
2006-08--2010-06   吉林大学,电子科学与工程学院   电子与科学技术工学学士学位

工作经历

   
工作简历
2022-09~现在, 中国科学院微电子研究所, 副研究员
2016-07~2022-09,中国科学院微电子研究所, 助理研究员

出版信息

   
近五年发表论文

(1) Investigation of Trap Evolution of Hf0.5Zr0.5O2 FeFET During Endurance Fatigue by Gate Leakage Current, IEEE TRANSACTIONS ON ELECTRON DEVICES, 2024, 通讯作者;
(2) Investigation of Charge Trapping Induced Trap Generation in Si FeFET With Ferroelectric Hf0.5Zr0.5O2, IEEE TRANSACTIONS ON ELECTRON DEVICES, 2024, 通讯作者;
(3) The physical origin of inhomogeneous field within HfO2-based ferroelectric capacitor, APPLIED PHYSICS LETTERS, 2024, 通讯作者;
(4) Fully Ferroelectric-FETs Reservoir Computing Network for Temporal and Random Signal Processing, IEEE TRANSACTIONS ON ELECTRON DEVICES, 2023, 第 6 作者;
(5) Dual-pulse disturb-free programming scheme for FeFET based neuromorphic computing, MICROELECTRONICS JOURNAL, 2023, 第 9 作者;
(6) Charge trapping effect at the interface of ferroelectric/interlayer in the ferroelectric field effect transistor gate stack, CHINESE PHYSICS B, 2023, 第 2 作者;
(7) Impact of Saturated Spontaneous Polarization on the Endurance Fatigue of Si FeFET With Metal/Ferroelectric/Interlayer/Si Gate Structure, IEEE TRANSACTIONS ON ELECTRON DEVICES, 2023, 第 2 作者;
(8) Investigation of Endurance Degradation Mechanism of Si FeFET With HfZrO Ferroelectric by an In Situ Vth Measurement, IEEE TRANSACTIONS ON ELECTRON DEVICES, 2023, 通讯作者;
(9) A Compact Model of Double Hysteresis Loop for Antiferroelectric Capacitor, IEEE TRANSACTIONS ON ELECTRON DEVICES, 2023, 通讯作者;
(10) A Physics-Based Model of Charge Trapping Behavior of Si FeFET With Metal/Ferroelectric/Interlayer/Si Structure, IEEE TRANSACTIONS ON ELECTRON DEVICES, 2023, 通讯作者;
(11) Advanced process and electron device technology, TSINGHUA SCIENCE AND TECHNOLOGY, 2022, 第 4 作者;
(12) Significant improvement of endurance of Si FeFET through minor hysteresis loop and narrow write pulse width, APPLIED PHYSICS EXPRESS, 2022, 第 2 作者;
(13) Trap Generation in Whole Gate Stacks of FeFET With TiN/Hf0.5Zr0.5O2/SiOx/Si (MFIS) Gate Structure During Endurance Fatigue, IEEE TRANSACTIONS ON ELECTRON DEVICES, 2022, 通讯作者;
(14) Depolarization Field in FeFET Considering Minor Loop Operation and Charge Trapping, IEEE TRANSACTIONS ON ELECTRON DEVICES, 2022, 通讯作者;
(15) First-principles study of oxygen vacancy defects in orthorhombic Hf0.5Zr0.5O2/SiO2/Si gate stack, JOURNAL OF APPLIED PHYSICS, 2022, 第 2 作者;
(16) A Compact Fully Ferroelectric-FETs Reservoir Computing Network With Sub-100 ns Operating Speed, IEEE ELECTRON DEVICE LETTERS, 2022, 第 9 作者;
(17) Impact of mobility degradation on endurance fatigue of FeFET with TiN/Hf0.5Zr0.5O2/SiOx/Si (MFIS) gate structure, JOURNAL OF APPLIED PHYSICS, 2022, 通讯作者;
(18) Endurance Improvement of Si FeFET by a Fully CMOS-Compatible Process: Insertion of HfOx a Hf0.5Zr0.5O2/SiOx Interface to Suppress Oxygen Vacancy Generation, IEEE TRANSACTIONS ON ELECTRON DEVICES, 2022, 第 2 作者; 
(19) 全球集成电路技术合作研发的发展现状及其经验启示, Status of Global Research and Development Cooperation in Integrated Circuits and Its Inspiration, 前瞻科技, 2022, 第 4 作者;
(20) Experimental Extraction and Simulation of Charge Trapping During Endurance of FeFET With TiN/HfZrO/SiO2/Si (MFIS) Gate Structure, IEEE TRANSACTIONS ON ELECTRON DEVICES, 2022, 通讯作者;
(21) Impact of Interlayer and Ferroelectric Materials on Charge Trapping during Endurance Fatigue of FeFET with TiN/HfxZr1-xO2/interlayer/Si (MFIS) Gate Structure, IEEE TRANSACTIONS ON ELECTRON DEVICES, 2021, 通讯作者.

科研活动

   
科研项目
( 1 ) 硅沟道铪基铁电FeFET的疲劳特性提升方法的研究, 参与, 国家任务, 2023-01--2025-12