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通信地址： 北京市朝阳区北土城西路3号中国科学院微电子研究所
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主要研究氧化铪基铁电器件技术，感兴趣的课题包括氧化铪基铁电材料特性调控、铁电晶体管可靠性表征与建模等。
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近五年发表论文
近五年发表论文共52篇，其中通讯作者发表论文18篇。
(1) Y. Ding, S. Dai, X. Sun, et al., Impact of Saturated Spontaneous Polarization on the Memory Window and Endurance of Hafnium-Based Si Channel FeFET. IEEE Transactions on Electron Devices, 2025.
(2) M. Bai, X. Sun, R. Han, et al., A One-Transistor DRAM Memory Cell Using HfO2-Based Ferroelectric-Assisted Charge Trapping Concept. IEEE Transactions on Electron Devices, 2025.
(3) X. Ke, S. Dai, H. Xu, et al., The physical origin of inhomogeneous field within HfO2-based ferroelectric capacitor. Applied Physics Letters, 2024.
(4) X. Ke, J. Chai, X. Shao, et al., Switching Dynamics of HfO2–ZrO2 Nanolaminates With Different Laminate Thicknesses. IEEE Transactions on Electron Devices, 2024.
(5) F. Tian, X. Sun, S. Li, et al., Investigation of Trap Evolution of Hf0.5Zr0.5O2 FeFET During Endurance Fatigue by Gate Leakage Current. IEEE Transactions on Electron Devices, 2024.
(6) S. Dai, S. Li, S. Xu, et al., Role of Nitrogen in Suppressing Interfacial States Generation and Improving Endurance in Ferroelectric Field-Effect Transistors. IEEE Transactions on Electron Devices, 2024.
(7) S. Dai, J. Chai, J. Duan, et al., Investigation of Hf₀.₅Zr₀.₅O₂ Ferroelectric Films at Low Thermal Budget (300 °C). IEEE Transactions on Electron Devices, 2024.
(8) X. Jia, J. Chai, J. Duan, et al., Investigation of Charge Trapping Induced Trap Generation in Si FeFET With Ferroelectric Hf0.5Zr0.5O2. IEEE Transactions on Electron Devices, 2024.
(9) X. Ke, S. Dai, H. Xu, et al., Distribution of the built-in field extracted from switching dynamics in HfO2-based ferroelectric capacitor. AIP Advances, 2024.
(10) X. Shao, J. Chai, F. Tian, et al., Investigation of Endurance Degradation Mechanism of Si FeFET With HfZrO Ferroelectric by an In Situ Vth Measurement. IEEE Transactions on Electron Devices, 2023.
(11) X. Sun, H. Xu, J. Chai, et al., Charge trapping effect at the interface of ferroelectric/interlayer in the ferroelectric field effect transistor gate stack. Chinese Physics B, 2023.
(12) X. Sun, J. Chai, F. Tian, et al., A Physics-Based Model of Charge Trapping Behavior of Si FeFET With Metal/Ferroelectric/Interlayer/Si Structure. IEEE Transactions on Electron Devices, 2023.
(13) M. Liao, J. Chai, J. Xiang, et al., A Compact Model of Double Hysteresis Loop for Antiferroelectric Capacitor. IEEE Transactions on Electron Devices, 2023.
(14) S. Zhao, F. Tian, H. Xu, et al., Experimental Extraction and Simulation of Charge Trapping During Endurance of FeFET With TiN/HfZrO/SiO2/Si (MFIS) Gate Structure. IEEE Transactions on Electron Devices, 2022.
(15) X. Jia, J. Xiang, H. Xu, et al., Depolarization Field in FeFET Considering Minor Loop Operation and Charge Trapping. IEEE Transactions on Electron Devices, 2022.
(16) J. Duan, S. Zhao, F. Tian, et al., Trap Generation in Whole Gate Stacks of FeFET With TiN/Hf0.5Zr0.5O2/SiOx/Si (MFIS) Gate Structure During Endurance Fatigue. IEEE Transactions on Electron Devices, 2022.
(17) J. Duan, H. Xu, S. Zhao, et al., Impact of mobility degradation on endurance fatigue of FeFET with TiN/Hf0.5Zr0.5O2/SiOx/Si (MFIS) gate structure. Journal of Applied Physics, 2022.
(18) F. Tian, S. Zhao, H. Xu, et al., Impact of Interlayer and Ferroelectric Materials on Charge Trapping During Endurance Fatigue of FeFET With TiN/HfxZr1-xO2/Interlayer/Si (MFIS) Gate Structure. IEEE Transactions on Electron Devices, 2021.