基本信息
刘成  男  硕导  中国科学院计算技术研究所
电子邮件: liucheng@ict.ac.cn
通信地址: 中科院计算所
邮政编码:

研究领域

专用硬件加速,FPGA可重构计算,容错计算

招生信息

硕导

招生专业
081201-计算机系统结构
招生方向
专用硬件加速,FPGA可重构计算,容错计算

教育背景

2009-09--2016-04   香港大学   博士
2007-09--2009-07   哈尔滨工业大学   硕士
2003-09--2007-07   哈尔滨工业大学   本科

工作经历

   
工作简历
2018-06~现在, 中国科学院计算技术研究所, 副研
2016-12~2018-06,新加坡国立大学, Research Fellow

出版信息

   
发表论文
[1] Liu, Cheng, Gao, Zhen, Liu, Siting, Ning, Xuefei, Li, Huawei, Li, Xiaowei. Fault-Tolerant Deep Learning: A Hierarchical Perspective. The 40th IEEE VLSI Test Symposium (VTS)null. 2022, [2] 李玟, 王颖, 刘成, 何银涛, 刘炼, 李华伟, 李晓维. On-line Fault Protection for ReRAM-based Neural Networks. IEEE Transactions on Computers[J]. 2022, [3] 何羽泉, 曲松云, 林刚亮, 王颖, 刘成, 张磊. Processing-in-SRAM Acceleration for Ultra-Low Power Visual 3D Perception. In proceedings of ACM/IEEE Design Automation Conference (DAC)null. 2022, [4] 陈维伟, 王颖, 徐颖, 高成思, 刘成, 张磊. A Framework for Neural Network Architecture and Compiler Co-Optimization. ACM Transactions on Embedded Computing Systems (TECS)[J]. 2022, [5] Benjamin Chen Ming Choong, Tao Luo, Cheng Liu, Bingsheng He, Wei Zhang, Joey Tianyi Zhou. Hardware-software co-exploration with racetrack memory based in-memory computing for CNN inference in embedded systems. Journal of Systems Architecture. 2022, 128: [6] Xue, Xinghua, Huang, Haitong, Liu, Cheng, Wang, Ying, Luo, Tao, Zhang, Lei. Winograd Convolution: A Perspective from Fault Tolerance. In proceedings of ACM/IEEE Design Automation Conference (DAC),null. 2022, [7] 梁胜文, 元志敏, 王颖, 刘成, 李华伟, 李晓维. VStore: In-Storage Graph Based Vector Search Accelerator. ACM/IEEE Design Automation Conference (DAC)null. 2022, [8] Liang, Shengwen, Wang, Ying, Liu, Cheng, He, Lei, Li, Huawei, Xu, Dawen, Li, Xiaowei. EnGN: A High-Throughput and Energy-Efficient Accelerator for Large Graph Neural Networks. IEEE TRANSACTIONS ON COMPUTERS[J]. 2021, 70(9): 1511-1525, [9] 何银涛, 王颖, 刘成, 李华伟, 李晓维. TARe: Task-Adaptive in-situ ReRAM Computing for Graph Learning. In proceedings of ACM/IEEE Design Automation Conference (DAC)null. 2021, [10] 陈维伟, 王颖, 林刚亮, 高成思, 刘成, 张磊. CHaNAS: Coordinated Search for Network Architecture and Scheduling Policy. Language, Compilers, Tools and Theory of Embedded Systems (LCTES)null. 2021, [11] Liu, Cheng, Chu, Cheng, Xu, Dawen, Wang, Ying, Wang, Qianlong, Li, Huawei, Li, Xiaowei, Cheng, KwangTing. HyCA: A Hybrid Computing Architecture for Fault Tolerant Deep Learning. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD)[J]. 2021, http://arxiv.org/abs/2106.04772.
[12] 李沧元, 王颖, 刘成, 梁胜文, 李华伟, 李晓维. GLIST: Towards In-Storage Graph Learning. USENIX Annual Technical Conference (ATC)null. 2021, [13] Xu, Dawen, Zhu, Ziyang, Liu, Cheng, Wang, Ying, Zhao, Shuang, Zhang, Lei, Liang, Huaguo, Li, Huawei, Cheng, KwangTing. Reliability Evaluation and Analysis of FPGA-Based Neural Network Acceleration System. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS[J]. 2021, 29(3): 472-484, http://dx.doi.org/10.1109/TVLSI.2020.3046075.
[14] Xu, Dawen, He, Meng, Liu, Cheng, Wang, Ying, Cheng, Long, Li, Huawei, Li, Xiaowei, Cheng, KwangTing. R2F: A Remote Retraining Framework for AIoT Processors With Computing Errors. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS[J]. 2021, 29(11): 1955-1966, [15] 王梦迪, 王颖, 刘成, 张磊. Network-on-Interposer Design for Agile Neural-Network Processor Chip Customization. proceedings of ACM/IEEE Design Automation Conference (DAC)[J]. 2021, [16] 马晓晗, 佀畅, 王颖, 刘成, 张磊. NASA: Accelerating Neural Network Design with a NAS Processor. International Symposium on Computer Architecture (ISCA)[J]. 2021, [17] Cheng, Long, Wang, Ying, Liu, Qingzhi, Epema, Dick H J, Liu, Cheng, Mao, Ying, Murphy, John. Network-Aware Locality Scheduling for Distributed Data Operators in Data Centers. IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS[J]. 2021, 32(6): 1494-1510, http://dx.doi.org/10.1109/TPDS.2021.3053241.
[18] 何羽泉, 王颖, 刘成, 张磊. PicoVO: A Lightweight RGB-D Visual Odometry Targeting Resource-Constrained IoT Devices. The 2021 IEEE International Conference on Robotics and Automation (ICRA)[J]. 2021, [19] 贺磊, 刘成, 王颖, 梁胜文, 李华伟. GCiM: A Near-Data Processing Accelerator for Graph Construction. IEEE/ACM Proceedings of Design, Automation Conference (DAC)null. 2021, [20] Xu, Dawen, Liu, Cheng, Wang, Ying, Tu, Kaijie, He, Bingsheng, Zhang, Lei. Accelerating Generative Neural Networks on Unmodified Deep Learning Processors-A Software Approach. IEEE TRANSACTIONS ON COMPUTERS[J]. 2020, 69(8): 1172-1184, http://dx.doi.org/10.1109/TC.2020.3001033.
[21] 许达文, 王乾龙, 刘成, 褚程, 王颖, 梁华国, 郑光庭. A Hybrid Computing Architecture for Fault-tolerant Deep Learning Accelerators. The 38th IEEE International Conference on Computer Design (ICCD)null. 2020, [22] 梁胜文, 刘成, 王颖, 李华伟, 李晓维. DeepBurning-GL: an Automated Framework for Generating Graph Neural Network Accelerators. IEEE/ACM International Conference on Computer-Aided Design (ICCAD)[J]. 2020, [23] Zhao, Xiandong, Wang, Ying, Liu, Cheng, Shi, Cong, Tu, Kaijie, Zhang, Lei. BitPruner: Network Pruning for Bit-serial Accelerators. PROCEEDINGS OF THE 2020 57TH ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC)[J]. 2020, [24] Xu, Dawen, Chu, Kexin, Liu, Cheng, Wang, Ying, Zhang, Lei, Li, Huawei. CNT-Cache: an Energy-Efficient Carbon Nanotube Cache with Adaptive Encoding. PROCEEDINGS OF THE 2020 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE 2020)[J]. 2020, 963-966, [25] Xu, Dawen, Zhu, Ziyang, Liu, Cheng, Wang, Ying, Li, Huawei, Zhang, Lei, Cheng, KwangTing. Persistent Fault Analysis of Neural Networks on FPGA-based Acceleration System. 2020 IEEE 31ST INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES AND PROCESSORS (ASAP 2020)[J]. 2020, 85-92, [26] Xu Dawen, Li Li, Wang Ying, Liu Cheng, Li Huawei. Exploring Emerging CNFET for Efficient Last Level Cache Design. 24TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC 2019)[J]. 2019, 426-431, http://dx.doi.org/10.1145/3287624.3287700.
[27] Liang Shengwen, Wang Ying, Liu Cheng, Li Huawei, Li Xiaowei. InS-DLA: An In-SSD Deep Learning Accelerator for Near-Data Processing. 2019 29TH INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS (FPL)[J]. 2019, 173-179, [28] 许达文, 邢扣子, 刘成, 王颖, 梁华国, 张磊. Resilient Neural Network Training for Accelerators with Computing Errors. The 30th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP)null. 2019, [29] Gui, ChuangYi, Zheng, Long, He, Bingsheng, Liu, Cheng, Chen, XinYu, Liao, XiaoFei, Jin, Hai. A Survey on Graph Processing Accelerators: Challenges and Opportunities. JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY[J]. 2019, 34(2): 339-371, http://lib.cqvip.com/Qikan/Article/Detail?id=7001743641.
[30] 刘成, 陈鑫宇, 何丙胜, 王颖, 张磊. OBFS: OpenCL Based BFS Optimization on Software Programmable FPGAs. In 2019 International Conference on Field Programmable Technology (FPT)null. 2019, [31] Xu Dawen, Tu Kaijie, Wang Ying, Liu Cheng, He Bingsheng, Li Huawei, Assoc Comp Machinery. FCN-Engine: Accelerating Deconvolutional Layers in Classic CNN Processors. 2018 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN (ICCAD) DIGEST OF TECHNICAL PAPERSnull. 2018, [32] Liu Cheng, Ng HoCheung, So Hayden KwokHay. QuickDough: A Rapid FPGA Loop Accelerator Design Framework Using Soft CGRA Overlay. 2015 INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE TECHNOLOGY (FPT)[J]. 2015, 56-63, http://apps.webofknowledge.com/CitedFullRecord.do?product=UA&colName=WOS&SID=5CCFccWmJJRAuMzNPjj&search_mode=CitedFullRecord&isickref=WOS:000383741900008.
发表著作
(1) FPGA overlays. In FPGAs for Software Programmers, Springer, 2016-12, 第 2 作者

科研活动

   
科研项目
( 1 ) 基于FPGA的专用高能效图计算加速研究, 主持, 国家级, 2021-01--2022-12
( 2 ) 面向深度学习处理器的弹性容错技术研究, 主持, 国家级, 2022-01--2025-12
( 3 ) 容错深度学习处理器的自动化设计, 主持, 市地级, 2021-06--2023-06