基本信息
董立松  男  硕导  中国科学院微电子研究所
电子邮件: donglisong@ime.ac.cn
通信地址: 北京市朝阳区北土城西路3号
邮政编码:

招生信息

   
招生专业
080903-微电子学与固体电子学
080300-光学工程
085400-电子信息
招生方向
集成电路先导工艺技术
光学模型
计算光刻

教育背景

2008-09--2014-07   北京理工大学   博士研究生
2004-09--2008-07   合肥工业大学   学士学位

工作经历

   
工作简历
2017-07~现在, 中国科学院微电子研究所, 副研究员
2014-09~2017-07,中国科学院微电子研究所, 助理研究员
2008-09~2014-07,北京理工大学, 博士研究生
2004-09~2008-07,合肥工业大学, 学士学位

教授课程

集成电路先进光刻与版图设计优化
超大规模集成电路先进光刻理论与应用

专利与奖励

   
专利成果
( 1 ) 一种NAND Flash时序测试方法, 2021, 第 3 作者, 专利号: CN110797076B

( 2 ) 一种NAND Flash存储器读阈值电压修复方法, 2021, 第 3 作者, 专利号: CN110706735B

( 3 ) 一种确定光刻工艺节点禁止周期的方法及仿真方法, 2021, 第 4 作者, 专利号: CN111025856B

( 4 ) 测试图形的选取方法和装置、构建光刻模型的方法和装置, 2021, 第 3 作者, 专利号: CN108153995B

( 5 ) 一种光刻工艺禁止周期确定方法及装置, 2021, 第 3 作者, 专利号: CN113064328A

( 6 ) 一种获取套刻误差量测数据的方法及装置, 2020, 第 4 作者, 专利号: CN111123662A

( 7 ) 提高版图光刻性能的方法、修正后的版图及仿真方法, 2020, 第 3 作者, 专利号: CN110989289A

( 8 ) 一种套刻误差的补偿方法及装置, 2020, 第 3 作者, 专利号: CN110941150A

( 9 ) 光源掩模协同优化方法, 2020, 第 4 作者, 专利号: CN105425532B

( 10 ) 一种基于版图几何特征匹配的光刻解决方案预测方法, 2019, 第 5 作者, 专利号: CN106773541B

( 11 ) 晶圆清洗装置及晶圆清洗方法, 2018, 第 4 作者, 专利号: CN108649006A

( 12 ) 五级衍射光栅结构及其制备方法、晶圆光刻对准方法, 2017, 第 2 作者, 专利号: CN105607435B

( 13 ) 七级衍射光栅结构及其制备方法、晶圆光刻对准方法, 2017, 第 2 作者, 专利号: CN105549138B

( 14 ) 一种掩膜图形的优化方法、最佳焦平面位置测量方法及系统, 2017, 第 1 作者, 专利号: CN105785724B

( 15 ) 一种焦面位置测试掩膜版及确定焦面位置的方法及装置, 2017, 第 1 作者, 专利号: CN106707684A

( 16 ) 一种基板及其制备方法, 2013, 第 7 作者, 专利号: CN103298248A

出版信息

   
发表论文
(1) Compensation of EUV lithography mask blank defect based on an advanced genetic algorithm, Optics Express, 2021, 通讯作者
(2) Projection-based high coverage fast layout decomposing algorithm of metal layer for accelerating lithography friendly design at full chip level, JOURNAL OF MICRO-NANOPATTERNING MATERIALS AND METROLOGY-JM3, 2021, 第 5 作者
(3) Aberration optimization in an extreme ultraviolet lithography projector via a BP neural network and simulated annealing algorithm, APPLIED OPTICS, 2021, 通讯作者
(4) Fast EUV Lithography Source Optimization Using Cascade Compressed Sensing, IEEE TRANSACTIONS ON NANOTECHNOLOGY, 2021, 通讯作者
(5) Understanding and Mitigating Stress Memorization Technique of Induced Layout Dependencies for NMOS HKMG Device, IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY, 2021, 第 5 作者
(6) Compressive sensing method for EUV source optimization using different bases, Proc. SPIE, 2020, 
(7) EUV multilayer defect characterization via cycle-consistent learning, OPTICS EXPRESS, 2020, 第 4 作者
(8) Impact of flare on source mask optimization in EUVL for 7nm technology node, Proc. SPIE, 2020, 
(9) Analysis and modulation of aberration in an extreme ultraviolet lithography projector via rigorous simulation and a back propagation neural network, APPLIED OPTICS, 2020, 通讯作者
(10) Fast extreme ultraviolet lithography mask near-field calculation method based on machine learning, APPLIED OPTICS, 2020, 第 2 作者
(11) Analysis and Mitigation of Forbidden Pitch Effects for EUV Lithography, SPIE, 2020, 
(12) 化学外延方式的嵌段共聚物定向自组装, Block Co-Polymer Directed Self-Assembly Based on Chemo-Epitaxy, 微纳电子技术, 2020, 第 4 作者
(13) A Study on Three Dimensional Mask Effect of Attenuated Phase-Shift Mask in Advanced Optical Lithography, A Study on Three Dimensional Mask Effect of Attenuated Phase-Shift Mask in Advanced Optical Lithography, CHINESE JOURNAL OF ELECTRONICS, 2020, 第 3 作者
(14) 先进工艺下的版图邻近效应研究进展, Research Progress of Layout Proximity Effect in Recent CMOS Nodes, 微电子学, 2020, 第 4 作者
(15) PECVD参数对含氢非晶碳刻蚀特性的影响研究, Influence of PECVD Parameters on Etching Characteristics of α-C∶H, 微电子学, 2020, 第 2 作者
(16) 针对更精确电迁移预测应用的热耦合模型建模, Thermal Coupling Modeling for More Accurate Electromigration Prediction, 微电子学, 2020, 第 5 作者
(17) Impact of EUV Multilayer Mask Defects on Imaging Performance and its Correction Methods, INTERNATIONAL CONFERENCE ON EXTREME ULTRAVIOLET LITHOGRAPHY 2019, 2019, 第 1 作者
(18) 光学系统像差对极紫外光刻成像特征尺寸的影响, Influence of Optical System Aberration on Critical Dimension of EUV Lithography Imaging, 光学学报, 2019, 第 3 作者
(19) A diffraction-based overlay model based on FDTD method, METROLOGY, INSPECTION, AND PROCESS CONTROL FOR MICROLITHOGRAPHY XXXIII, 2019, 第 3 作者
(20) SoulNet: ultrafast optical source optimization utilizing generative neural networks for advanced lithography, JOURNAL OF MICRO-NANOLITHOGRAPHY MEMS AND MOEMS, 2019, 第 3 作者
(21) DESIGN DRIVEN TEST PATTERNS FOR SMO OPC AND SPA, 2019 CHINA SEMICONDUCTOR TECHNOLOGY INTERNATIONAL CONFERENCE (CSTIC), 2019, 第 2 作者
(22) EUV MASK NEAR-FIELD SYNTHESIS, 2019 CHINA SEMICONDUCTOR TECHNOLOGY INTERNATIONAL CONFERENCE (CSTIC), 2019, 第 3 作者
(23) Sample patterns extraction from layout automatically based on hierarchical cluster algorithm for lithography process optimization, DESIGN-PROCESS-TECHNOLOGY CO-OPTIMIZATION FOR MANUFACTURABILITY XIII, 2019, 第 4 作者
(24) PREDICTION MODEL OF ETCHING BIAS BASED ON ARTIFICIAL NEURAL NETWORK, 2019 CHINA SEMICONDUCTOR TECHNOLOGY INTERNATIONAL CONFERENCE (CSTIC), 2019, 第 1 作者
(25) THE IMPACT OF SEGMENT LENGTH ON THE PROCESS WINDOW IN SMO, 2019 CHINA SEMICONDUCTOR TECHNOLOGY INTERNATIONAL CONFERENCE (CSTIC), 2019, 第 1 作者
(26) Probability prediction model for bridging defects induced by combined influences from lithography and etch variations, JOURNAL OF MICRO-NANOLITHOGRAPHY MEMS AND MOEMS, 2019, 第 5 作者
(27) Design Rule Exploration for Width Sensitive Zone for Metal Layers in Advanced Nodes, DESIGN-PROCESS-TECHNOLOGY CO-OPTIMIZATION FOR MANUFACTURABILITY XIII, 2019, 第 1 作者
(28) Impact of mask topography and flare on process window of EUV lithography, INTERNATIONAL CONFERENCE ON EXTREME ULTRAVIOLET LITHOGRAPHY 2019, 2019, 第 1 作者
(29) Learning-based compressive sensing method for EUV lithographic source optimization, OPTICS EXPRESS, 2019, 第 2 作者
(30) A Fast DFM-Driven Standard Cell Qualification Approach for Critical Layers of 14nm Technology Node, PHOTOMASK TECHNOLOGY 2019, 2019, 第 4 作者
(31) A Method for Compensating Lithographic Influence of EUV Mask Blank Defects by an Advanced Genetic Algorithm, INTERNATIONAL CONFERENCE ON EXTREME ULTRAVIOLET LITHOGRAPHY 2019, 2019, 第 1 作者
(32) Selection of DBO measurement wavelength for bottom mark asymmetry based on FDTD method, Selection of DBO measurement wavelength for bottom mark asymmetry based on FDTD method, JOURNAL OF SEMICONDUCTORS, 2019, 第 3 作者
(33) RESIST MODEL SETUP FOR NEGATIVE TONE DEVELOPMENT AT 14NM NODE, IEEE, 2018, 
(34) Retargeting of forbidden-dense-alternate structures for lithography capability improvement in advanced nodes, APPLIED OPTICS, 2018, 第 2 作者
(35) Pattern quality and defect evaluation based on cross correlation and power spectral density methods, JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, 2018, 第 6 作者
(36) Fast optical proximity correction method based on nonlinear compressive sensing, OPTICS EXPRESS, 2018, 第 5 作者
(37) Optimization of absorber and multilayer in EUV mask for 1D and 2D patterns, INTERNATIONAL CONFERENCE ON EXTREME ULTRAVIOLET LITHOGRAPHY 2018, 2018, 第 2 作者
(38) The method of optimizing mask parameter suitable for lithography process, Proc. SPIE, 2018, 第 1 作者
(39) Optimized parameters selected on the basis of the development defect model, JOURNAL OF MICRO-NANOLITHOGRAPHY MEMS AND MOEMS, 2018, 第 4 作者
(40) The Method of Optimizing Mask Parameters Suitable for Lithography Process, OPTICAL MICROLITHOGRAPHY XXXI, 2018, 第 1 作者
(41) Development defect model for immersion photolithography, JOURNAL OF MICRO-NANOLITHOGRAPHY MEMS AND MOEMS, 2018, 第 3 作者
(42) Optimization of the focus monitor mark in immersion lithography according to illumination type, JOURNAL OF MICRO-NANOLITHOGRAPHY MEMS AND MOEMS, 2017, 第 1 作者
(43) 光源掩模协同优化的原理与应用, 半导体技术, 2017, 第 3 作者
(44) New alignment mark design structures for higher diffraction order wafer quality enhancement, METROLOGY, INSPECTION, AND PROCESS CONTROL FOR MICROLITHOGRAPHY XXXI, 2017, 第 2 作者
(45) Hotspots Fixing Flow in NTD Process by Using DTCO Methodology at 10nm Metal 1 Layer, DESIGN-PROCESS-TECHNOLOGY CO-OPTIMIZATION FOR MANUFACTURABILITY XI, 2017, 第 1 作者
(46) Mitigating the influence of wafer topography on the implantation process in optical lithography, Optics Letter, 2017, 第 5 作者
(47) Applications of RCWA on EUV mask optics, 2017, 第 2 作者
(48) Necessity of resist model in source mask optimization for negative tone development process, JOURNAL OF MICRO-NANOLITHOGRAPHY MEMS AND MOEMS, 2017, 第 2 作者
(49) Optimization of the focus monitor mark in immersion lithography according to illumination type, J. Micro/Nanolith. MEMS MOEMS, 2017, 第 5 作者
(50) Optimization of the focus monitor mark in immersion lithography according to illumination type, JOURNAL OF MICRO-NANOLITHOGRAPHY MEMS AND MOEMS, 2017, 第 1 作者
(51) Hotspots fixing flow in NTD process by using DTCO methodology at 10nm metal 1 layer, 2017, 第 6 作者
(52) New alignment mark designs in single patterning and self-aligned double patterning, MICROELECTRONIC ENGINEERING, 2017, 第 2 作者
(53) New alignment mark design structures for higher diffraction order wafer quality enhancement, 2017, 第 3 作者
(54) Characteristic study of image-based alignment for increasing accuracy in lithography application, JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, 2017, 第 2 作者
(55) Necessity of resist model in source mask optimization for negative tone development process, J. Micro/Nanolith. MEMS MOEMS, 2017, 第 2 作者
(56) Improving the topography performance of ion implantation resist, OPTICAL MICROLITHOGRAPHY XXX, 2017, 第11作者
(57) Necessity of resist model in source mask optimization for negative tone development process, JOURNAL OF MICRO-NANOLITHOGRAPHY MEMS AND MOEMS, 2017, 第 2 作者
(58) Mitigating the influence of wafer topography on the implantation process in optical lithography, OPTICS LETTERS, 2017, 第 1 作者
(59) AN OFFLINE ROUGHNESS EVALUATION SOFTWARE AND ITS APPLICATION IN QUANTITATIVE CALCULATION OF WIGGLING BASED ON LOW FREQUENCY POWER SPECTRAL DENSITY METHOD, 2017 CHINA SEMICONDUCTOR TECHNOLOGY INTERNATIONAL CONFERENCE (CSTIC 2017), 2017, 第 1 作者
(60) Improving the topography performance of ion implantation resist, 2017, 第 1 作者
(61) An off-line roughness evaluation software and its application in quantitative calculation of wiggling based on low frequency power spectrum density method, 2017, 第 1 作者
(62) Optimization of resist parameters to improve the profile and process window of the contact pattern in advanced node, Journal of micro/nanolithography, MEMS, and MOEMS: JM3, 2016, 第11作者
(63) A novel mask structure for measuring the defocus of scanner, Metrology, inspection, and process control for microlithography XXX : Part two of two parts /, 2016, 第 1 作者
(64) Optimization of resist parameters to improve the profile and process window of the contact pattern in advanced node, JOURNAL OF MICRO-NANOLITHOGRAPHY MEMS AND MOEMS, 2016, 第 1 作者
发表著作
( 1 ) 计算光刻与版图优化, 电子工业出版社, 2021-01, 第 3 作者

科研活动

   
科研项目
( 1 ) 超大数值孔径光刻中的负显影模型研究, 负责人, 国家任务, 2019-01--2021-12
( 2 ) 5纳米光刻技术方案与设计规则优化, 参与, 国家任务, 2017-01--2020-12