080903-微电子学与固体电子学

先进SOI材料，SOI高迁移率器件，SOI抗辐照器件，集成电路材料基因组

2009-09--2011-06   德国于利希研究中心(Forschungszentrum Juelich)   联合培养博士生
2005-09--2011-06   中国科学院上海微系统与信息技术研究所   研究生/博士
2001-09--2005-06   复旦大学   本科/学士

   

2011-06~现在, 中国科学院上海微系统与信息技术研究所, 助理研究员、副研究员、研究员
2011-06~2011-08,德国于利希研究中心(Forschungszentrum Juelich), 访问学者

   

（ 1 ） 利用离子注入释放单晶氮化铝应力的方法, 发明专利, 2022, 第 3 作者, 专利号: CN202210146662

（ 2 ） 三维堆叠的环栅晶体管的制备方法, 发明专利, 2022, 第 2 作者, 专利号: CN111435643B

（ 3 ） 高通量薄膜沉积设备及薄膜沉积方法, 发明专利, 2021, 第 2 作者, 专利号: CN113862625A

（ 4 ） 基于隧穿隔离层的磁性隧穿结器件及其制作方法, 发明专利, 2021, 第 2 作者, 专利号: CN111293212B

（ 5 ） 改善自热效应的SOI器件及其制备方法, 发明专利, 2021, 第 2 作者, 专利号: CN111986996B

（ 6 ） 真空沟道晶体管及其制备方法, 发明专利, 2021, 第 3 作者, 专利号: CN113594004A

（ 7 ） 真空沟道晶体管及其制作方法, 发明专利, 2021, 第 3 作者, 专利号: CN113594006A

（ 8 ） 全环绕栅极晶体管的制备方法, 发明专利, 2021, 第 3 作者, 专利号: CN113539792A

（ 9 ） 环栅晶体管的制备方法, 发明专利, 2021, 第 2 作者, 专利号: CN111435678B

（ 10 ） 减少侧边漏电的SOI场效应晶体管及其制备方法, 发明专利, 2021, 第 2 作者, 专利号: CN111952182B

（ 11 ） 基于SOI衬底的热光相移器的制备方法, 发明专利, 2021, 第 2 作者, 专利号: CN112305785A

（ 12 ） 具有空腔结构的半导体衬底及其制备方法, 发明专利, 2020, 第 1 作者, 专利号: CN111952239A

（ 13 ） 具有辅助支撑结构的半导体衬底及其制备方法, 发明专利, 2020, 第 1 作者, 专利号: CN111952241A

（ 14 ） 基于空腔包围结构的场效应晶体管及制备方法, 发明专利, 2020, 第 2 作者, 专利号: CN111952186A

（ 15 ） 具有纳米级空腔结构的SOI衬底及其制备方法, 发明专利, 2020, 第 1 作者, 专利号: CN111952240A

（ 16 ） 基于图形化埋层介质层的环栅场效应晶体管的制备方法, 发明专利, 2020, 第 2 作者, 专利号: CN111952184A

（ 17 ） 具有环栅结构的场效应晶体管的制备方法, 发明专利, 2020, 第 1 作者, 专利号: CN111952183A

（ 18 ） 具有空腔结构的SOI衬底及其制备方法, 发明专利, 2020, 第 1 作者, 专利号: CN111952238A

（ 19 ） 具有隔离层的场效应晶体管及其制备方法, 发明专利, 2020, 第 2 作者, 专利号: CN111952188A

（ 20 ） 可降低对准难度的SOI器件及其制备方法, 发明专利, 2020, 第 2 作者, 专利号: CN111952185A

（ 21 ） 具有隔离层的鳍式场效应晶体管及其制备方法, 发明专利, 2020, 第 2 作者, 专利号: CN111952181A

（ 22 ） 具有漏电屏蔽结构的SOI场效应晶体管及其制备方法, 发明专利, 2020, 第 2 作者, 专利号: CN111952187A

（ 23 ） 基于空腔包围结构的环形栅场效应晶体管及制备方法, 发明专利, 2020, 第 2 作者, 专利号: CN111952189A

（ 24 ） 图形化结构的SOI衬底的制备方法, 发明专利, 2020, 第 2 作者, 专利号: CN111435637A

（ 25 ） 基于图形化SOI衬底的半导体纳米线结构及其制备方法, 发明专利, 2020, 第 2 作者, 专利号: CN111435649A

（ 26 ） 多通道环栅晶体管, 发明专利, 2020, 第 2 作者, 专利号: CN111435682A

（ 27 ） 环栅晶体管及其制备方法, 发明专利, 2020, 第 2 作者, 专利号: CN111435644A

（ 28 ） 三维堆叠的半导体纳米线结构及其制备方法, 发明专利, 2020, 第 2 作者, 专利号: CN111435642A

（ 29 ） 三维堆叠的环栅晶体管及其制备方法, 发明专利, 2020, 第 2 作者, 专利号: CN111435641A

（ 30 ） 图形化结构的SOI衬底及其制备方法, 发明专利, 2020, 第 2 作者, 专利号: CN111435666A

（ 31 ） 基于二维器件的三维MRAM存储结构及其制作方法, 发明专利, 2020, 第 2 作者, 专利号: CN111293136A

（ 32 ） 基于二维CMOS的三维MRAM存储结构及其制作方法, 发明专利, 2020, 第 2 作者, 专利号: CN111293137A

（ 33 ） 三维MRAM存储结构及其制作方法, 发明专利, 2020, 第 2 作者, 专利号: CN111293138A

（ 34 ） 基于柔性衬底的磁性隧穿结器件及其制作方法, 发明专利, 2020, 第 2 作者, 专利号: CN111293214A

（ 35 ） 基于二维自由磁层的磁性隧穿结器件及其制作方法, 发明专利, 2020, 第 2 作者, 专利号: CN111293215A

（ 36 ） 基于二维材料的磁性隧穿结器件及其制作方法, 发明专利, 2020, 第 2 作者, 专利号: CN111293213A

（ 37 ） 磁性隧穿结器件及其制作方法, 发明专利, 2020, 第 2 作者, 专利号: CN111293216A

（ 38 ） 高通量气相沉积设备及气相沉积方法, 专利授权, 2019, 第 2 作者, 专利号: CN110408910A

（ 39 ） 基于图形化SOI衬底的抗辐照晶体管及其制作方法, 专利授权, 2019, 第 2 作者, 专利号: CN109935628A

（ 40 ） 一种图形化绝缘体上硅衬底材料及其制备方法, 发明专利, 2018, 第 1 作者, 专利号: CN105895575B

（ 41 ） 场效应晶体管结构及其制备方法, 发明专利, 2018, 第 4 作者, 专利号: CN107871780A

（ 42 ） 利用可控缺陷石墨烯插入层制备金属-半导体合金的方法, 专利授权, 2017, 第 3 作者, 专利号: CN106711019A

（ 43 ） SiGeSn材料及其制备方法, 专利授权, 2017, 第 3 作者, 专利号: CN106328502A

（ 44 ） 基于绝缘体上硅衬底的射频共面波导元件及其制备方法, 专利授权, 2016, 第 1 作者, 专利号: CN105914445A

（ 45 ） 基于绝缘体上硅衬底的射频电容元件及其制备方法, 发明专利, 2016, 第 1 作者, 专利号: CN105895507A

（ 46 ） 用于射频与CMOS电路共集成的绝缘体上硅衬底及制备方法, 专利授权, 2016, 第 1 作者, 专利号: CN105810694A

（ 47 ） 基于绝缘体上硅衬底的射频电感元件及其制备方法, 发明专利, 2016, 第 1 作者, 专利号: CN105789189A

（ 48 ） 一种绝缘体岛上硅衬底材料及其制备方法, 发明专利, 2016, 第 1 作者, 专利号: CN105633001A

（ 49 ） 一种基于绝缘体岛上硅衬底的CMOS器件结构及制备方法, 发明专利, 2016, 第 1 作者, 专利号: CN105633084A

（ 50 ） 一种图形化绝缘体上硅衬底材料及其制备方法, 发明专利, 2016, 第 1 作者, 专利号: CN105633002A

（ 51 ） 一种绝缘体岛上硅衬底材料及其制备方法, 发明专利, 2016, 第 1 作者, 专利号: CN105552019A

（ 52 ） 一种图形化绝缘体上Si/NiSi2衬底材料及其制备方法, 发明专利, 2016, 第 2 作者, 专利号: CN103137538B

（ 53 ） 一种基于图形化绝缘体上硅衬底的CMOS器件结构及制备方法, 发明专利, 2016, 第 1 作者, 专利号: CN105428358A

（ 54 ） 一种基于绝缘体岛上硅衬底的CMOS器件结构及制备方法, 发明专利, 2016, 第 1 作者, 专利号: CN105390495A

（ 55 ） 基于sSi/SiGe/sSOI衬底的CMOS器件及其制作方法, 发明专利, 2015, 第 4 作者, 专利号: CN105097846A

（ 56 ） 基于Si/SiGe/Si量子阱MOSFET的生物传感器及其制备方法, 发明专利, 2015, 第 2 作者, 专利号: CN104730111A

（ 57 ） 基于超薄绝缘层SOI上的MOSFET背栅生物传感器及其制备方法, 发明专利, 2015, 第 2 作者, 专利号: CN104730137A

（ 58 ） 基于sSOI MOSFET的生物传感器及其制备方法, 发明专利, 2015, 第 2 作者, 专利号: CN104713931A

（ 59 ） 一种基于硅纳米线隧穿场效应晶体管的生物传感器及其制备方法, 发明专利, 2014, 第 1 作者, 专利号: CN103558279A

（ 60 ） 一种基于隧穿场效应晶体管的生物传感器及其制备方法, 发明专利, 2014, 第 1 作者, 专利号: CN103558280A

（ 61 ） 一种垂直结构的隧穿场效应晶体管及其制备方法, 发明专利, 2014, 第 2 作者, 专利号: CN103560152A

（ 62 ） 一种隧穿场效应晶体管及其制备方法, 发明专利, 2014, 第 2 作者, 专利号: CN103560153A

（ 63 ） 一种基于垂直结构隧穿场效应晶体管的生物传感器及其制备方法, 发明专利, 2014, 第 2 作者, 专利号: CN103558254A

（ 64 ） 一种图形化全耗尽绝缘体上Si/NiSi 2 衬底材料及其制备方法, 发明专利, 2013, 第 1 作者, 专利号: CN103137546A

（ 65 ） 一种绝缘体上Si/NiSi 2 衬底材料及其制备方法, 发明专利, 2013, 第 1 作者, 专利号: CN103137547A

（ 66 ） 一种绝缘体上Si/CoSi 2 衬底材料及其制备方法, 发明专利, 2013, 第 2 作者, 专利号: CN103137539A

（ 67 ） 一种绝缘体上Si/NiSi 2 衬底材料及其制备方法, 发明专利, 2013, 第 1 作者, 专利号: CN103137547A

（ 68 ） 一种绝缘体上Si/CoSi 2 衬底材料及其制备方法, 发明专利, 2013, 第 2 作者, 专利号: CN103137539A

（ 69 ） 一种图形化全耗尽绝缘体上Si/CoSi 2 衬底材料及其制备方法, 发明专利, 2013, 第 2 作者, 专利号: CN103137537A

（ 70 ） 一种图形化全耗尽绝缘体上Si/NiSi 2 衬底材料及其制备方法, 发明专利, 2013, 第 1 作者, 专利号: CN103137546A

（ 71 ） 一种图形化绝缘体上Si/CoSi 2 衬底材料及其制备方法, 发明专利, 2013, 第 1 作者, 专利号: CN103137565A

（ 72 ） 一种图形化全耗尽绝缘体上Si/CoSi 2 衬底材料及其制备方法, 发明专利, 2013, 第 2 作者, 专利号: CN103137537A

（ 73 ） 一种图形化绝缘体上Si/NiSi 2 衬底材料及其制备方法, 发明专利, 2013, 第 2 作者, 专利号: CN103137538A

（ 74 ） 一种图形化绝缘体上Si/CoSi 2 衬底材料及其制备方法, 发明专利, 2013, 第 1 作者, 专利号: CN103137565A

   

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（1） 集成电路材料基因组技术, 电子工业出版社, 2021-12, 第 1 作者

   

（ 1 ） 无背栅 SOI MOS 器件研制及其抗总剂量辐射效应机理研究, 负责人, 国家任务, 2017-01--2020-12
（ 2 ） 纳米级全耗尽高迁移率应变硅锗量子阱沟道器件研究, 负责人, 地方任务, 2012-10--2015-09
（ 3 ） 高迁移率Si/SiGe/SOI 量子阱MOS器件载流子散射机理研究, 负责人, 国家任务, 2014-01--2016-12
（ 4 ） 中国科学院“青年创新促进会”项目, 负责人, 中国科学院计划, 2014-01--2017-12
（ 5 ） 16/14nm基础技术研究 绝缘体上III-V族化合物衬底材料制备技术研究, 参与, 中国科学院计划, 2013-01--2014-12
（ 6 ） 面向超灵敏探测的异质集成研究, 负责人, 中国科学院计划, 2016-07--2021-06
（ 7 ） 集成电路材料基因组关键技术研究与应用示范, 负责人, 地方任务, 2020-08--2022-07
（ 8 ） 略, 负责人, 国家任务, 2022-01--2024-12

（1）High Hole Mobility Si/SiGe/SOI Quantum-well Transistor   2015-10-24
（2）High Hole Mobility (s)Si/SiGe/(s)SOI Quantum Well p-MOSFETs   第八届中国功能材料及应用学术会议   2013-08-24
（3）Characteristics of higher-κ dielectric LaLuO3 with TiN as gate stack   2012-10-29
（4）Hole mobility enhancement of quantum-well p-MOSFETs on sSi/sSi0.5Ge0.5/sSOI heterostructure   2012-05-14
（5）High Mobility Si/Si0.5Ge0.5/strained SOI p-MOSFET with HfO2/TiN Gate Stack   2010-11-01

已指导学生

王翼泽  硕士研究生  080903-微电子学与固体电子学  

刘晨鹤  博士研究生  080903-微电子学与固体电子学  

刘强  博士研究生  080903-微电子学与固体电子学  

陈玲丽  硕士研究生  080903-微电子学与固体电子学  

赵兰天  博士研究生  080903-微电子学与固体电子学  

朱宇波  硕士研究生  080903-微电子学与固体电子学  

现指导学生

魏涛  博士研究生  080903-微电子学与固体电子学  

周虹阳  硕士研究生  085400-电子信息  

姜文铮  硕士研究生  080903-微电子学与固体电子学  

林紫威  硕士研究生  080903-微电子学与固体电子学  

秦瑞东  博士研究生  080903-微电子学与固体电子学  

陈锦  硕士研究生  080903-微电子学与固体电子学  

刘语欣  博士研究生  080903-微电子学与固体电子学  

黄琪  博士研究生  080903-微电子学与固体电子学