080903-微电子学与固体电子学
085400-电子信息

新型纳米存储器件与集成技术
集成电路先导工艺技术

1994-09--2003-07   北京大学   本、硕、博士学位

   

2010-03~现在, 中科院微电子研究所, 研究员
2003-09~2010-02,韩国.三星半导体研发中心, 高级工程师

存储器工艺与器件技术
集成电路制造工艺与设备

   

（1） 集成电路产业技术创新战略联盟技术创新奖, 其他, 2019
（2） 集成电路产业技术创新战略联盟技术创新奖, , 其他, 2018
（3） 2017年度中国科学院微电子研究所科研成果一等奖, 研究所（学校）, 2017
（4） 2017年度中国科学院微电子研究所研究生喜爱的导师, 研究所（学校）, 2017
（5） 2016年度中国科学院微电子研究所显著科研进展, 研究所（学校）, 2016
（6） 2016年度中国科学院微电子研究所研究生喜爱的导师, 研究所（学校）, 2016
（7） 22纳米集成电路核心工艺技术及应用, 一等奖, 市地级, 2016
（8） 2015年度中国科学院微电子研究所研究生喜爱的导师, 研究所（学校）, 2015
（9） 2015年度中国科学院微电子研究所科研成果奖一等奖, 一等奖, 研究所（学校）, 2015
（10） 2015年度中国科学院“***计划”终期评估优秀, , 院级, 2015
（11） 2014年度中国科学院杰出科技成果奖, 院级, 2014

   

（1） Impact of Cycling Induced Intercell Trapped Charge on Retention Charge Loss in 3-D NAND Flash Memory[J], IEEE Journal of the Electron Devices Society,, 2020, 通讯作者
（2） Influence of accumulated charges on deep trench etch process in 3D NAND memory[J], Semiconductor Science and Technology, 2020, 通讯作者
（3） Analysis and Optimization of Threshold Voltage Variability by Polysilicon Grain Size Simulation in 3D NAND Flash Memory [J], IEEE Journal of the Electron Devices Society, 2020, 通讯作者
（4） Optimization of Performance and Reliability in 3D NAND Flash Memory [J], IEEE Electron Device Letters, 2020, 通讯作者
（5） . A novel solution to improve saddle-shape warpage in 3D NAND flash memory[J], Semiconductor Science and Technology, 2020, 通讯作者
（6） 一种用于三维闪存测试的低成本PMU电路, 微电子学与计算机, 2020, 通讯作者
（7） 3D NAND闪存数据保持力与初始状态依赖性研究[J], 电子学报, 2020, 通讯作者
（8） Multi-Coding ECC Algorithm Based on 3D Charge Trap NAND Flash Hot Region Cell Prediction, IEEE Communications Letters, 2020, 通讯作者
（9） Investigation of Program Noise in Charge Trap Based 3D NAND Flash Memory[J], IEEE Electron Device Letters, 2020, 通讯作者
（10） An Improved Dimensional Measurement Method of Staircase Patterns with Higher Precision in 3D NAND[J], IEEE Access, 2020, 通讯作者
（11） Hydrogen Source and Diffusion Path for Poly-Si Channel Passivation in Xtacking 3D NAND Flash Memory[J], Journal of the Electron Devices Society, 2020, 通讯作者
（12） 三维存储器技术中高热预算条件下表面沟道 PMOS开发研究, 微电子学, 2019, 通讯作者
（13） An effective process to remove etch damage prior to selective epitaxial growth in 3D NAND flash memory, Semiconductor Science and Technology, 2019, 通讯作者
（14） Cycling induced Trap Generation and Recovery near the Top Select Gate Transistor in 3D NAND, 2019 IEEE International Reliability Physics Symposium (IRPS), 2019, 通讯作者
（15） Influence of rapid thermal annealing on the wafer warpage in 3D NAND flash memory, Semiconductor Science and Technology, 2019, 通讯作者
（16） Investigation of Threshold Voltage Distribution Temperature Dependence in 3D NAND Flash, IEEE Electron Device Letters, 2019, 通讯作者
（17） Program Voltage Generator with Ultra-Low Ripple for 3D NAND Flash in Standard CMOS Process, 2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC), 2019, 通讯作者
（18） 三维闪存中基于钨互连的空气隙结构的制备工艺, 半导体制造技术, 2019, 通讯作者
（19） Investigation of erase cycling induced TSG Vt shift in 3D NAND Flash Memory, IEEE Electron Device Letters, 2019, 通讯作者
（20） 3D NAND Flash的片上控制逻辑电路设计, 微电子学与计算机, 2019, 通讯作者
（21） 适用于3D NAND的高稳定度的capacitor-free LDO, 现代电子技术, 2019, 通讯作者
（22） A High Density and Low Cost Staircase Scheme for 3D NAND Flash Memory: SDS(Stair Divided Scheme), ECS Journal of Solid State Science and Technology, 2019, 通讯作者
（23） The influence of grain boundary interface traps on electrical characteristics of top select gate transistor in 3D NAND flash memory, Solid State Electronics, 2018, 通讯作者
（24） A Novel Program Scheme for Program Disturbance Optimization in 3-D NAND Flash Memory, IEEE Electron Device Letters, 2018, 通讯作者
（25） The Optimization of Gate All Around-L-Shaped Bottom Select Transistor in 3D NAND Flash Memory, Journal of Nanoscience and Nanotechnology, 2018, 通讯作者
（26） Word line interference based data recovery technique for 3D NAND Flash, IEICE Electronics Express, 2018, 通讯作者
（27） A fast read retry method for 3D NAND flash memories using novel valley search algorithm, IEICE Electronics Express, 2018, 通讯作者
（28） Impact of BEOL Film Deposition on Poly-Si 3D NAND Device Characteristics, ICSICT 2018 （International Conference on Solid-State and Integrated Circuit Technology, 2018, 通讯作者
（29） Modeling and optimization of array leakage in 3 D NAND flash memory, 2018 IEEE International Conference on Integrated Circuits, Technologies and Applications, 2018, 通讯作者
（30） Investigation of Reducing Bow during High Aspect Ratio Trench Etching in 3D NAND Flash Memory, IEEE 14th International Conference on Solid-State and Integrated-Circuit Technology, 2018, 通讯作者
（31） A 12V Low-ripple and High-Efficiency Charge Pump with Continuous Regulation Scheme for 3D NAND Flash Memories, IEEE 14th International Conference on Solid-State and Integrated-Circuit Technology, 2018, 通讯作者
（32） Investigation of Cycling-Induced Dummy Cell Disturbance in 3D NAND Flash Memory, IEEE ELECTRON DEVICE LETTERS, 2017, 通讯作者
（33） A Novel Read Scheme for Read Disturbance Suppression in 3D NAND Flash Memory, IEEE Electron Device Letters, 2017, 通讯作者
（34） Leakage Characterization of Top Select Transistor for Program Disturbance Optimization in 3D NAND Flash, Solid State Electronics, 2017, 通讯作者
（35） A 1.2mV ripple, 4.5V charge pump using controllable pumping current technology, IEICE Electronics Express, 2017, 通讯作者
（36） Dynamic LLR scheme based on EM algorithm for LDPC decoding in NAND flash memory, IEICE Electronics Express, 2017, 通讯作者
（37） A high efficiency all-PMOS charge pump for 3D NAND flash memory, Journal of Semiconductors, 2016, 通讯作者
（38） Investigation of tunneling layer and inter-gate-dielectric engineered TaN floating gate memory, Integrated Ferroelectrics, 2016, 通讯作者
（39） Impact of Critical Geometry Dimension on Channel Boosting Potential in 3D NAND Memory, 2016 IEEE 13th International Conference on Solid-State and Integrated Circuit Technology, 2016, 通讯作者
（40） Simulation On Threshold Voltage Of L-Shaped Bottom Select Transistor In 3D NANDFlash Memory, 2016 IEEE 13th International Conference on Solid-State and Integrated Circuit Technology, 2016, 通讯作者
（41） String Select Transistor Leakage Suppression By Threshold Voltage Modulation In 3DNAND Flash Memory, 2016 IEEE 13th International Conference on Solid-State and Integrated Circuit Technology, 2016, 通讯作者
（42） Performance Enhancement of Metal Floating Gate Memory By Using a Bandgap Engineered High-k Tunneling Barrier, Ecs Transactions, 2016, 通讯作者
（43） Low temperature post deposition annealing investigation for 3D charge trap flash memory by Kelvin probe force microscopy, Applied physics A, 2015, 第 1 作者
（44） Physical Modeling of Gate-Controlled Schottky Barrier Lowering of Metal-Graphene Contacts in Top-Gated Graphene Field-Effect Transistors, scientific reports, 2015, 通讯作者
（45） Impact of continuing scaling on the device performance of 3D cylindrical junction-less charge trapping memory, Journal of Semiconductors, 2015, 通讯作者
（46） A write buffer design based on stable and area-saving embedded SRAM for flash applications, Science China Technological Sciences, 2015, 通讯作者
（47） Gate Bias Dependence of Complex Random Telegraph Noise Behavior in 65-nm NOR Flash Memory, IEEE Electron Device Letters, 2015, 通讯作者
（48） Low temperature atomic layer deposited HfO2 film for high performance charge trapping flash memory application, Semiconductor Science and Technology, 2014, 第 2 作者
（49） A Write buffer based on stable and area saving embedded SRAM for flash applications, Science China, 2014, 第 2 作者
（50） A 65-nm 1-Gb NOR floating-gate flash memory with less than 50-ns access time, Chin. Sci. Bull, 2014, 第 2 作者
（51） Effect of Pre-annealing to Blocking Oxide on the Performance of Dual Trappinglayer Engineered Charge Trapping Memory, Integrated Ferroelectrics, 2014, 第 2 作者
（52） Comparison of N2 and O2 anneal on the integrity of Al2O3/Si3N4/SiO2/Si memory gate stack, Chinese Physics B, 2014, 第 4 作者
（53） Investigation of charge loss characteristics of HfO2 annealed in N2 or O2 ambient, Chinese Journal of Semiconductors, 2014, 第 2 作者
（54） Investigation of HfAlO trapping layer with various Al contents by variable temperature Kelvin probe force microscopy, ECS Transactions, 2014, 第 2 作者
（55） A Study of P/E Cycling Impaction on Drain Disturb for 65nm NOR Flash Memories by Low Frequency Noise Analyze, Integrated Ferroelectrics: An International, 2014, 第 2 作者
（56） Metal Floating Gate Memory Device With SiO2/HfO2 Dual-Layer as Engineered Tunneling Barrier, Electron Device Letters, 2014, 第 2 作者
（57） A simple and accurate method to measure program/erase speed in a memory capacitor structure, Chin. Phys. B, 2013, 第 3 作者
（58） Investigation of Charge Loss Mechanism of Thickness-Scalable Trapping Layer by Variable Temperature Kelvin Probe Force Microscopy, IEEE ELECTRON DEVICE LETTERS, 2013, 第 2 作者
（59） In situ electron holography study of charge distribution in high-κ charge -trapping memory, Nature, 2013, 第 3 作者
（60） Effect of Damage in Source and drain on the endurance of a 65-nm-node NOR flash memory, IEEE Transactions on Electron Devices, 2013, 第 3 作者
（61） Visualization on Charge Distribution Behavior in Thickness-Scalable HfO2 Trapping Layer by In-situ Electron Holography and, International memory workshop (IMW 2013), 2013, 第 2 作者
（62） Optimization of HfO2 growth process by atomic layer deposition (ALD) for high performance charge trapping Flash memory application, Ecs Transactions, 2013, 第 2 作者
（63） Process Optimization Of HfAlO Trapping Layer For High Performance Charge Trap Flash Memory Application, Ecs Transactions, 2013, 第 2 作者
（64） Charge Loss Characteristics of Different Al Contents in a HfAlO Trapping Layer Investigated by Variable Temperature, Chinese Physics Letters, 2013, 第 2 作者
（65） Effects of Interfacial Fluorination on Performance Enhancement of High-k-Based Charge Trap Flash Memory, JAPANESE JOURNAL OF APPLIED PHYSICS, 2013, 第 2 作者
（66） Isolated nanographene crystals for nano-floating gate in charge trapping memory, SCI, 2013, 第 4 作者
（67） 能带工程在电荷俘获存储器性能和可靠性中的角色 , Effect of bandgap engineering on theperformance and reliability of a high-kbased nanoscale charge trap flash memory, J. Phys. D: Appl. Phys., 2012, 第 3 作者
（68） MANOS结构中高温退火效应研究, Effect of high temperature annealing on the performance of MANOS charge trapping memory, Science China-Technological Sciences, 2012, 第 3 作者
（69） 基于电容和电流测量的硅纳米晶存储器缺陷产生行为分析, Analyzing Trap Generation in Silicon-Nanocrystal Memory Devices Using Capacitance and Current Measurement, SCIENCE CHINA Technological Sciences, 2012, 第 4 作者
（70） Cycling-Induced Peak-Like Interface State Generation in Si-Nanocrystal Memory Devices, IEEE Electron Device Letters, 2012, 第 3 作者
（71） Comparison of tunneling current assisted by neutral and positive traps with finite ranged core-potential, Journal of Appl. Physics, 2012, 第 3 作者
（72） 基于芯壳结构的纳米晶存储器, Improved performance of non-volatile memory with Au-Al2O3 core-shell nanocrystals embedded in HfO2 matrix, Appl. Phys. Lett. , 2012, 第 3 作者
（73） MANOS结构中阻挡层高温氧退火效应研究, Effects of high-temperature O2 annealing on Al2O3 blocking layer and Al2O3/Si3N4 interface for MANOS structures , J. Phys. D: Appl. Phys. , 2012, 第 3 作者
（74） Analysis of Cycling Induced Interface Degradation In Si Nanocrystal Memory Devices, Ecs Transactions, 2012, 第 3 作者
（75） 多声子陷阱辅助隧穿机制的统一模型研究, Unification of three multiphonon trap-assisted tunneling mechanisms, JOURNAL OF APPLIED PHYSICS, 2011, 第 2 作者
（76） 采用EFM对高K电荷俘获存储器界面相关的俘获与损失特性研究, Investigation on interface related charge trap and loss characteristics of high-k based trapping structures by electrostatic force microscopy,  Appl. Phys. Lett, 2011, 第 3 作者
（77） 用于高温应用的铝纳米晶存储器研究, Performance-improved nonvolatile memory with aluminum nanocrystals embedded in Al2O3 for high temperature applications, JOURNAL OF APPLIED PHYSICS , 2011, 第 2 作者
（78） 采用AlO/HfSiO双层阻挡层结构的电荷俘获存储器研究, Improved charge trapping flash device with Al2O3/HfSiO stack as blocking layer, Chinese Phys. B, 2011, 第 2 作者
（79） 一种用于硅纳米晶存储器的结辅助编程新方法, A Novel Junction Assisted Programming Scheme for Si- Nanocrystal Memory Devices with Improved Performance, Semicond. Sci. Technol, 2011, 第 2 作者
（80） 基于HfO/TaO双层存储结构的电荷俘获存储器研究, Improved speed and data retention characteristics in flash memory using a stacked HfO2/Ta2O5 charge-trapping layer, Semicond. Sci. Technol, 2011, 第 2 作者
（81） 硅纳米晶存储器中擦写引起的缺陷产生机制分析, Analysis of Trap Generation during Programming/Erasing Cycling in Silicon Nanocrystal Memory Devices, Semiconductor Science and technology, 2011, 第 4 作者
（82） 石墨烯边缘氢化用于DNA测序增强, Enhanced DNA sequencing performance through edge- hydrogenation of graphene electrodes, Adv. Funct. Mater., 2011, 通讯作者
（83） 纳米晶存储器多次擦写引起的退化机理研究, A Study of Cycling Induced Degradation Mechanisms in Si nano-crystal Memory Devices, Nanotechnology, 2011, 第 3 作者
（84） Investigation on interface related charge trap and loss characteristics of high-k based trapping structures by electrostaticforce microscopy, Applied Physics Letters, 2011, 第 3 作者
（85） Optimization of Silicon Nanocrystals Growth Process by LPCVD for Non-Volatile Memory Application, Thin Solid Films, 2011, 第 2 作者
（86） A novel 2-T structure memory device using a Si nanodot for embedded application, J. Semicond, 2011, 第 4 作者
（87） Material properties and effective work function of reactive sputtered TaN gate electrodes, J. Semicond, 2011, 第 2 作者
（88） 基于存储层能带调制概念实现多态闪存器件的性能增强, Performance enhancement of multi-level cell nonvolatile memory by using a band-gap engineered high-к trapping layer , Applied Physics Letters , 2010, 第 2 作者
（89） Performance enhancement of multi-level cell nonvolatile memory by using a bandgap engineered high-k trapping layer, Applied Physics Letters, 2010, 第 2 作者
（90） 利用金属纳米晶实现的阻变存储器中纳米导电细丝的可控生长, Controllable Growth of Nanoscale Conductive Filaments in Solid-Electrolyte -Based ReRAM by Using a Metal, ACS Nano, 2010, 通讯作者
（91） 一种实现纳米晶性能增强的结辅助编程新方法, Performance Improvement of Si-NC Memory Device by Using a Novel Junction Assisted Programming Scheme, ECS Transaction, 2010, 第 2 作者
（92） 

   

（1）A High Efficiency All -PMOS Charge Pump for 3D NAND Flash Memory   2015-11-03
（2）A Novel Adaptive CMOS Low-dropout Regulator with 3A Sink/Source Capability   2015-11-03
（3）Investigation of charge loss mechanisms in 3D TANOS cylindrical junction-less charge trapping memory    2014-10-28
（4）Modeling and analizing of chip level circuit design for 3D-Stackable NAND flash memory   2014-10-28
（5）A page buffer design based on stable and Area-saving embedden sram for flash applications   2014-10-28
（6） Program charge effect on random telegraph noise behavior in multi-level floating gate flash memory   2014-10-28
（7）Cauterization of total ionizing dose effect investigated by in-situ measurements for a 65nm flash technology   2014-10-28
（8）An simple approach to evaluate TID response in high voltage MOSFET for 65nm flash technology   2014-10-28
（9）Performance improvement for Metal/Al2O3/HfO2 / SiO2 /Si structure nonvolatile flash memory by fluorine plasma treatment   2012-10-29
（10）HighPerformance MAHAHOS Memory Devices--Charge Trapping and Distribution in Bandgap Engineered Structure   2012-05-20
（11）Charge trapping and distribution in storage structure: Investigation of bandgap engineered high-k based memory device   2012-05-20
（12）Improved Performance of Nanocrystal Memory Embedded with Au-Al2O3 Core-shell Nanoparticles,   2012-04-10
（13）Reducing Formation Time of the Inversion Layer by Illumination around a Memory Capacitor   2012-03-18
（14）Investigation of charge trapping and loss characteristics for charge trap flash memory by electrostatic force microscopy   2011-11-07
（15）Investigation of charge trapping and loss characteristics for charge trap flash memory by electrostatic force microscopy   2011-11-07
（16）Performance optimization for TANOS by using pre-treatment of plasma oxygenic ions   2011-11-07
（17）Performance optimization for MANOS by using pre-treatment of plasma oxygenic ions   2011-07-31
（18）Bandgap engineered HfO2/Al2O3/HfO2 trapping layer for high-performance charge trap memory   2011-06-12
（19）Novel MAHOS-type flash memory using different charge trapping layers   2011-06-12
（20）Stacked high-k charge trapping layer for high performance flash memory application   2011-03-13
（21）Performance Improvement of Si-NC memory device by using a novel programming scheme   2011-03-13
（22）Pre-cycling with higher voltages for endurance improvement of silicon nanocrystal memory device   2010-11-01
（23）Improved Performance of Si-NC Memory Using a Novel Two-Step Program Scheme   2010-11-01

已指导学生

李新开  硕士研究生  085209-集成电路工程  

韩宇龙  硕士研究生  080903-微电子学与固体电子学  

付丽银  硕士研究生  085209-集成电路工程  

邹兴奇  博士研究生  080903-微电子学与固体电子学  

张瑜  博士研究生  080903-微电子学与固体电子学  

彭俊力  硕士研究生  080903-微电子学与固体电子学  

徐强  博士研究生  080903-微电子学与固体电子学  

赵成林  硕士研究生  085208-电子与通信工程  

闫亮  硕士研究生  085209-集成电路工程  

徐启康  硕士研究生  085209-集成电路工程  

罗流洋  硕士研究生  085209-集成电路工程  

李子夫  硕士研究生  085209-集成电路工程  

李志  硕士研究生  085208-电子与通信工程  

李琦  硕士研究生  085209-集成电路工程  

门顶顶  硕士研究生  085208-电子与通信工程  

黄策策  博士研究生  080903-微电子学与固体电子学  

洪培真  博士研究生  080903-微电子学与固体电子学  

现指导学生

李婷  博士研究生  080903-微电子学与固体电子学  

杜智超  博士研究生  080903-微电子学与固体电子学  

曹华敏  博士研究生  080903-微电子学与固体电子学  

杨雪  硕士研究生  080903-微电子学与固体电子学  

王泳珊  硕士研究生  080903-微电子学与固体电子学  

王乾乾  博士研究生  080903-微电子学与固体电子学  

宋璧若  博士研究生  080903-微电子学与固体电子学  

靳方圆  博士研究生  080903-微电子学与固体电子学  

贾信磊  博士研究生  080903-微电子学与固体电子学  

常新帅  硕士研究生  085400-电子信息