基本信息
徐高卫  男  硕导  中国科学院上海微系统与信息技术研究所
电子邮件: xugw@mail.sim.ac.cn
通信地址: 上海市长宁路865号
邮政编码:

招生信息

   
招生专业
080903-微电子学与固体电子学
085400-电子信息
招生方向
先进封装及超导低温封装

教育背景

2004-04--2007-07   中国科学院研究生院   博士
1990-08--1993-02   西安电子科技大学   硕士
1986-07--1990-07   西安电子科技大学   学士学位

工作经历

   
工作简历
2020-06~2023-06,中国科学院上海微系统与信息技术研究所, 副研究员
2015-09~2020-06,中国科学院上海微系统与信息技术研究所, 副研究员
2015-03~2015-09,德国弗赖堡大学, 访问学者
2004-04~2015-02,中国科学院上海微系统与信息技术研究所, 副研究员
2004-04~2007-07,中国科学院研究生院, 博士
1990-08~1993-02,西安电子科技大学, 硕士
1986-07~1990-07,西安电子科技大学, 学士学位
社会兼职
2018-06-22-2021-06-21,上海市电子学会SMT/MPT专业委员会, 委员

专利与奖励

   
奖励信息
(1) 高灵敏度光电传感器芯片及其便携式嵌入式光谱仪关键技术, 二等奖, 省级, 2015
专利成果
( 1 ) 倒装芯片封装结构及其制备方法, 2023, 第 1 作者, 专利号: 2023102978728

( 2 ) 一种倒装焊凸点限位结构及其制备方法, 2022, 第 1 作者, 专利号: 202211617989.1

( 3 ) 低温固体介电常数测量方法, 2022, 第 1 作者, 专利号: 202110802223X

( 4 ) 无缺陷穿硅通孔结构的制备方法, 2021, 第 3 作者, 专利号: CN109037149B

( 5 ) 一种倒装芯片的凸点结构及其制备方法, 2020, 第 1 作者, 专利号: CN111933609A

( 6 ) 有源基板及其制备方法, 2019, 第 1 作者, 专利号: CN109592634A

( 7 ) 滤波器封装结构及其封装方法, 2019, 第 3 作者, 专利号: CN109461661A

( 8 ) 圆片级硅基集成小型化分形天线及其制备方法, 2019, 第 3 作者, 专利号: CN109346821A

( 9 ) 可拆卸封装结构及其制备方法, 2019, 第 1 作者, 专利号: 201811497519.X

( 10 ) 一种电镀铜的方法, 2017, 第 3 作者, 专利号: CN107502935A

( 11 ) 圆片级封装结构及其制备方法, 2017, 第 3 作者, 专利号: CN107452638A

( 12 ) 图像传感器圆片级封装方法及封装结构, 2017, 第 2 作者, 专利号: CN107045992A

( 13 ) 纳米孪晶铜布线层的制备方法, 2017, 第 4 作者, 专利号: CN106876294A

( 14 ) 集成无源元件转接板及其制备方法, 2016, 第 3 作者, 专利号: CN105679734A

( 15 ) 一种高品质因数电感制造方法, 2015, 第 3 作者, 专利号: CN105206542A

( 16 ) 一种高密度电感的制造方法, 2015, 第 3 作者, 专利号: CN105185906A

( 17 ) 一种高密度电感的制造方法, 2015, 第 3 作者, 专利号: CN105185907A

( 18 ) 一种高品质因数电感制造方法, 2015, 第 3 作者, 专利号: CN105140218A

( 19 ) 一种高品质因数电容制造方法, 2015, 第 3 作者, 专利号: CN105118771A

( 20 ) 基于纳米孪晶铜的凸点下金属层及制备方法, 2015, 第 3 作者, 专利号: CN105097746A

( 21 ) 电容电感复合结构及其制造方法, 2015, 第 3 作者, 专利号: CN104519661A

( 22 ) 减小圆片级集成无源器件翘曲的结构和制作方法, 2015, 第 3 作者, 专利号: CN104485325A

( 23 ) 一种铜-铜金属热压键合的方法, 2015, 第 3 作者, 专利号: CN104465428A

( 24 ) 一种深槽结构电容及其制造方法, 2015, 第 3 作者, 专利号: CN104409442A

( 25 ) 纳米孪晶铜再布线的制备方法, 2015, 第 5 作者, 专利号: CN104392939A

( 26 ) 双层底充胶填充的铜凸点封装互连结构及方法, 2014, 第 4 作者, 专利号: CN104078431A

( 27 ) 折叠槽天线结构及其制作方法, 2014, 第 3 作者, 专利号: CN103887601A

( 28 ) 一种图像传感器的圆片级封装方法及封装结构, 2014, 第 3 作者, 专利号: CN103855173A

( 29 ) 基于粘接剂的晶圆键合方法, 2014, 第 3 作者, 专利号: CN103824787A

( 30 ) 高Q电感及制备方法, 2014, 第 3 作者, 专利号: CN103824755A

( 31 ) 一种增强焊球与UBM粘附性的方法及封装结构, 2014, 第 3 作者, 专利号: CN103794583A

( 32 ) 增强介质层PI和金属Cu层之间粘附性的方法, 2014, 第 3 作者, 专利号: CN103794513A

( 33 ) 一种电镀铜的方法, 2014, 第 3 作者, 专利号: CN103794544A

( 34 ) 一种可见光器件圆片级封装结构和方法, 2014, 第 3 作者, 专利号: CN103681719A

( 35 ) 硅转接板结构及其圆片级制作方法, 2014, 第 4 作者, 专利号: CN103500729A

( 36 ) 一种集成宽频带天线及其制作方法, 2013, 第 3 作者, 专利号: CN103367863A

( 37 ) 图像传感器圆片级封装方法及其结构, 2013, 第 3 作者, 专利号: CN103247639A

( 38 ) 砷化镓图像传感器圆片级芯片尺寸封装方法及其结构, 2013, 第 3 作者, 专利号: CN103241707A

( 39 ) 一种提升光敏BCB薄膜可靠性的方法, 2013, 第 3 作者, 专利号: CN103203925A

( 40 ) 一种改进型的基于聚酰亚胺的湿度传感器, 2013, 第 3 作者, 专利号: CN103207215A

( 41 ) 制作TSV时采用的二次湿法腐蚀支撑晶圆分离的工艺, 2013, 第 4 作者, 专利号: CN103199054A

( 42 ) 一种采用非对准键合工艺来制作TSV的电镀方法, 2013, 第 4 作者, 专利号: CN103199026A

( 43 ) 高深宽比深孔的种子层的制备方法, 2013, 第 3 作者, 专利号: CN103187364A

( 44 ) 圆片级封装结构中的重布线层的制备方法及形成的结构, 2013, 第 3 作者, 专利号: CN103187312A

( 45 ) 一种焊点制备方法及其结构, 2013, 第 3 作者, 专利号: CN103187324A

( 46 ) 一种可用于微波频段的圆片级穿硅传输结构及制造方法, 2013, 第 4 作者, 专利号: CN103066040A

( 47 ) 双面布线封装的圆片级大厚度光敏BCB背面制作方法, 2013, 第 3 作者, 专利号: CN103065985A

( 48 ) 一种圆片级穿硅通孔TSV的制作方法, 2013, 第 3 作者, 专利号: CN102903673A

( 49 ) 一种与RDL工艺兼容的电感元件及制造方法, 2012, 第 3 作者, 专利号: CN102779807A

( 50 ) 一种利用穿硅通孔的微波多芯片封装结构及其制作方法, 2012, 第 4 作者, 专利号: CN102723306A

( 51 ) 一种双面溅射金属层减小硅圆片翘曲的结构, 2012, 第 3 作者, 专利号: CN102655125A

( 52 ) 利用集成pn结测量多芯片埋置型封装芯片接面温度的方法, 2012, 第 3 作者, 专利号: CN102610539A

( 53 ) 利用集成电阻测量多芯片埋置型封装芯片接面温度的方法, 2012, 第 3 作者, 专利号: CN102593024A

( 54 ) 一种实现红外焦平面阵列探测器中硅读出电路测试的方法, 2012, 第 3 作者, 专利号: CN102590731A

( 55 ) 一种改进型湿度传感器的制作方法, 2012, 第 3 作者, 专利号: CN102590291A

( 56 ) 多层金属化薄膜叠加制作电感元件的方法, 2012, 第 3 作者, 专利号: CN102569032A

( 57 ) 圆片级芯片尺寸封装应力缓冲结构, 2012, 第 3 作者, 专利号: CN102569232A

( 58 ) 一种基于BCB/Au制作集成射频贴片微带天线的方法, 2012, 第 3 作者, 专利号: CN102570018A

( 59 ) 利用TSV技术实现GaAs图像传感器的圆片级封装方法, 2012, 第 3 作者, 专利号: CN102544040A

( 60 ) GaAs CCD图形传感器圆片级芯片尺寸封装工艺, 2012, 第 3 作者, 专利号: CN102509718A

( 61 ) 基于聚酰亚胺和填充物腐蚀的湿度传感器结构改进及方法, 2012, 第 3 作者, 专利号: CN102507669A

( 62 ) 低温下砷化镓图像传感器圆片级芯片尺寸封装工艺, 2012, 第 3 作者, 专利号: CN102431963A

( 63 ) 一种增强BCB和Au之间粘附性的方法, 2012, 第 3 作者, 专利号: CN102424355A

( 64 ) 一种制作锥形穿硅通孔时采用的刻蚀方法, 2012, 第 3 作者, 专利号: CN102337541A

( 65 ) 一种基于电镀工艺改善Sn-Ag焊料性能的方法, 2012, 第 3 作者, 专利号: CN102306631A

( 66 ) MEMS圆片级三维混合集成封装结构及方法, 2011, 第 1 作者, 专利号: CN102241388A

( 67 ) 一种制备Sn-Ag-In三元无铅倒装凸点的方法, 2011, 第 3 作者, 专利号: CN102222630A

( 68 ) 基于埋置式基板的三维多芯片封装模块及方法, 2011, 第 1 作者, 专利号: CN102163590A

( 69 ) 使用光敏BCB为介质层的圆片级MMCM封装结构及方法, 2011, 第 3 作者, 专利号: CN102110673A

( 70 ) 一种用于微波频段的穿硅同轴线的制造方法, 2011, 第 3 作者, 专利号: CN102097672A

( 71 ) 凹槽中焊接实现焊料倒扣焊的工艺方法, 2011, 第 3 作者, 专利号: CN101996906A

( 72 ) 一种基于电镀工艺制备铟焊球阵列方法, 2010, 第 3 作者, 专利号: CN101847592A

( 73 ) 封装制作晶圆TSV过程中所采用的腐蚀槽和工艺方法, 2010, 第 3 作者, 专利号: CN101840856A

( 74 ) 采用BCB辅助键合以实现穿硅通孔封装的制作工艺, 2010, 第 3 作者, 专利号: CN101834159A

( 75 ) 微机电系统三维垂直组合封装的结构及其制作方法, 2009, 第 2 作者, 专利号: CN101525116A

( 76 ) 三维多芯片封装模块和制作方法, 2009, 第 2 作者, 专利号: CN100530636C

出版信息

   
发表论文
(1) Design and Fabrication of Flip-chip Interconnection for Superconducting Circuits Based on Silicon Bumps, 24th International Conference on Electronic Packaging Technology (ICEPT), 2023, 通讯作者
(2) Golden Bump Based Flip-chip Interconnection for Superconducting Multi-chip Module, IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY, 2023, 通讯作者
(3) 基于铅铟合金线的SFQ多芯片超导互连方法研究, Research on Single-Flux-Quantum Multi-chip Superconducting Interconnection Based on Lead-Indium Alloy Wire, 低温物理学报, 2021, 通讯作者
(4) Design and Test of Transmission Line in SFQ Circuit, IEEE-22nd International Conference on Electronic Packaging Technology (ICEPT), 2021, 通讯作者
(5) A Novel Bumping Method for Flip-Chip Interconnection, IEEE-22nd International Conference on Electronic Packaging Technology (ICEPT), 2021, 通讯作者
(6) A Novel Superconducting Interconnection for Superconducting MCM Using Wire Bonding Method with Pb-In Alloy, 2020 21st International Conference on Electronic Packaging Technology (ICEPT), 2020, 通讯作者
(7) Copper/benzocyclotene thin film technique based microstrip bandpass filter featured by thick dielectric layer for low insertion loss, MICROWAVE AND OPTICAL TECHNOLOGY LETTERS, 2020, 第 3 作者
(8) An optimized through-via bottom-up method for simultaneous-filling TSVS of different aspect-ratios and its potential application on high-frequency passive interposer, MICROELECTRONICS JOURNAL, 2020, 第 3 作者
(9) Effects of microstructure of copper used in redistribution layer on wafer warpage evolution during the thermal process, JOURNAL OF MATERIALS SCIENCE-MATERIALS IN ELECTRONICS, 2019, 通讯作者
(10) 硅基BCB工艺X波段发夹型带通滤波器的实现, Realization of X-band hairpin band-pass filter with BCB process based on silicon, 传感器与微系统, 2019, 通讯作者
(11) In-Sn Bumping Design and Fabrication for High Speed Interconnects of Superconducting MCM via Laser Melting/jetting and distribution, IEEEISEC2019国际会议, 2019, 通讯作者
(12) 应用于MOEMS集成的TSV技术研究, Research of Through Silicon Via Technology for Micro-Opto- Electro-Mechanical System Integration, 传感技术学报, 2019, 通讯作者
(13) Reduce the wafer warpage introduced by Cu in RDL through adjusting the cooling temperatures, 2018 IEEE 68TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC 2018), 2018, 第 2 作者
(14) Deep understanding the role of Cu in RDL to warpage by exploring the warpage evolution with microstructural changes, 2018 IEEE 68th Electronic Components and Technology Conference: ECTC 2018, San Diego, California, USA, 29 May - 1 June 2018, pages 1857-2498, v.4, 2018, 第 2 作者
(15) A novel interposer fabrication method for integration of bandpass filter applied in high frequency, 2018 19TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY (ICEPT), 2018, 第 2 作者
(16) Interconnection Reliability for MCM of Large Micromirror Arrays and High Voltage Driving ASIC Based on High-density Substrate, 2018 19TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY (ICEPT), 2018, 通讯作者
(17) Influence of observed anelasticity of Cu on the wafer warpage evolution during thermal processes, 2018 19TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY (ICEPT), 2018, 第 2 作者
(18) Simulation and optimization of X-band microstrip filters based on high-resistance silicon wafer with BCB dielectric and new shielding TSV structure, 2017 18TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY (ICEPT), 2017, 通讯作者
(19) Influence of packaging effects on the mobile noise of planar SQUID gradiometer for airborne magnetic measurements, 2017 18TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY (ICEPT), 2017, 通讯作者
(20) Design and fabrication of wafer level suspended high Q MIM capacitors for RF integrated passive devices, MICROSYSTEMTECHNOLOGIESMICROANDNANOSYSTEMSINFORMATIONSTORAGEANDPROCESSINGSYSTEMS, 2017, 第 3 作者
(21) Study of the Wafer Warpage Evolution by Cooling to Extremely Low Temperatures, 2017 18TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY (ICEPT), 2017, 第 3 作者
(22) High performance suspended spiral inductor and band-pass filter by wafer level packaging technology, MICROSYSTEM TECHNOLOGIES-MICRO-AND NANOSYSTEMS-INFORMATION STORAGE AND PROCESSING SYSTEMS, 2017, 第 2 作者
(23) A new fabrication method of RF interposer applied in the integration of band pass filter in the frequency range of X band, 2017 18TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY (ICEPT), 2017, 第 3 作者
(24) 一种基于TSV和激光刻蚀辅助互连的改进型CIS封装, 半导体技术, 2017, 通讯作者
(25) In situ observation of nanotwins formation through twin terrace growth in pulse electrodeposited Cu films, SCIENTIFIC REPORTS, 2017, 通讯作者
(26) Design and fabrication of wafer level suspended high Q MIM capacitors for RF integrated passive devices, MICROSYSTEM TECHNOLOGIES-MICRO-AND NANOSYSTEMS-INFORMATION STORAGE AND PROCESSING SYSTEMS, 2017, 第 3 作者
(27) Wafer level high-density trench capacitors by using a two-step trench-filling process, MICROSYSTEM TECHNOLOGIES-MICRO-AND NANOSYSTEMS-INFORMATION STORAGE AND PROCESSING SYSTEMS, 2017, 第 2 作者
(28) Novel combined through-wafer-groove fabrication approach and its application in wafer level packaging of GaAs CCD, MICROSYSTEM TECHNOLOGIES-MICRO-AND NANOSYSTEMS-INFORMATION STORAGE AND PROCESSING SYSTEMS, 2016, 第 4 作者
(29) Influence of polyimide on thermal stress evolution in polyimide/cu thick film composite, JOURNAL OF MATERIALS SCIENCE-MATERIALS IN ELECTRONICS, 2016, 第 3 作者
(30) Integrated manufacturing of microphone-array node for wireless sensor network (wsn), 17th international conference on electronic packaging technology (icept), 2016, 通讯作者
(31) The nonlinearity of stress evolution in polymer-metal composite thin films during thermal treatment, 2016 Electronic Components & Technology Conference (ECTC), 2016, 第 3 作者
(32) Ku波段的新型分形小型化天线, Novel fractal miniaturized antenna in Ku band, 传感器与微系统, 2016, 第 3 作者
(33) Experimental identification of thermal induced warpage in polymer–metal composite films, MICROELECTRONICS RELIABILITY, 2016, 第 3 作者
(34) Explore of warpage origination in wlp and processing influence factors by experiment and theoretical modeling, JOURNAL OF MATERIALS SCIENCE-MATERIALS IN ELECTRONICS, 2016, 第 3 作者
(35) A novel wafer level high Q planar inductor using Ni-Zn ferrite/BCB composite thick film, 17th International Conference on Electronic Packaging Technology, 2016, 第 2 作者
(36) Novel combined through-wafer-groove fabrication approach and its application in wafer level packaging of GaAs CCD, MICROSYSTEM TECHNOLOGIES-MICRO-AND NANOSYSTEMS-INFORMATION STORAGE AND PROCESSING SYSTEMS, 2016, 第 4 作者
(37) Controllable large scaled nanotwin formation in cu film at lower temperatures, JOURNAL OF PHYSICS D-APPLIED PHYSICS, 2016, 第 4 作者
(38) Thermomechanical Behavior of Nanotwinned Copper Interconnection Line in Wafer Level Packaging and the Influence on Wafer Warpage, 2015 IEEE 65TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2015, 第 4 作者
(39) Design and Fabrication of Suspended high Q MIM Capacitors by Wafer Level Packaging Technology, The 16th International Conference on Electronic Packaging Technology (ICEPT), 2015, 第 1 作者
(40) A Novel WL-Integrated Low-Insertion-Loss Filter with Suspended High-Q Spiral Inductor and Patterned Ground Shields, Progress In Electromagnetics Research, 2015, 第 1 作者
(41) A novel mechanical diced trench structure for warpage reduction in wafer level packaging process, MICROELECTRONICS RELIABILITY, 2015, 第 3 作者
(42) Low Cost Fabrication of TSV-based Silicon Interposer Using Wet Chemical Etching and Its Application in 3D Packaging, 2014 15TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY (ICEPT), 2014, 第 5 作者
(43) Void control during plating process and thermal annealing of through-mask electroplated copper interconnects, MICROELECTRONICS RELIABILITY, 2014, 第 5 作者
(44) High Performance Silicon-Based Inductors for RF Integrated Passive Devices, PROGRESS IN ELECTROMAGNETICS RESEARCH-PIER, 2014, 第 2 作者
(45) Investigation of Wet-Etching- and Multiinterconnection-Based TSV and Application in 3-D Hetero-Integration, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 2014, 第 3 作者
(46) 掩膜电镀法制备圆片级封装重布线中孔洞形成机理研究, Study on the Void Formation in Through-Mask Plated Redistribution Layer in Wafer Level Package, 电子学报, 2014, 第 4 作者
(47) Influence of the Viscoelastic Properties of the Polyimide Dielectric Coating on the Wafer Warpage, JOURNAL OF ELECTRONIC MATERIALS, 2014, 第 3 作者
(48) Stress evolution during thermal cycling of copper/polyimide layered structures, MATERIALS SCIENCE IN SEMICONDUCTOR PROCESSING, 2014, 第 3 作者
(49) Fabrication of a microstrip patch antenna integrated in low-resistance silicon wafer using a BCB dielectric, JOURNAL OF SEMICONDUCTORS, 2013, 通讯作者
(50) Development of seed layer deposition and fast copper electroplating into deep microvias for three-dimensional integration, MICRO & NANO LETTERS, 2013, 第 2 作者
(51) Wafer-Level Packaging Design With Through Substrate Grooves as Interconnection for GaAs-Based Image Sensor, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 2013, 第 3 作者
(52) Process development of a novel wafer level packaging with TSV applied in high-frequency range transmission, MICROSYSTEM TECHNOLOGIES-MICRO-AND NANOSYSTEMS-INFORMATION STORAGE AND PROCESSING SYSTEMS, 2013, 第 3 作者
(53) Optimal design toward enhancement of thermomechanical reliability of polyimide layers in a flip-chip-on-lead-frame dual flat no-leads package with copper pillar bumps, MATERIALS SCIENCE IN SEMICONDUCTOR PROCESSING, 2013, 第 4 作者
(54) Fabrication and Microstructure evolution Of Preferred Oriented Nanotwinned Copper By Pulse Electroplating for RDL in WLP, 2013 14TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY (ICEPT), 2013, 第 4 作者
(55) System Integration for Miniature Node of Wireless Sensor Network (WSN), 2012 13TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY & HIGH DENSITY PACKAGING (ICEPT-HDP 2012), 2012, 通讯作者
(56) Development of wafer level glass frit bonding by using barrier trench technology and precision screen printing, MICROELECTRONIC ENGINEERING, 2012, 第 4 作者
(57) TSV Interposer with Au-Au Diffusion Bonding Technology for Wafer Level Fabrication, 2012 13TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY & HIGH DENSITY PACKAGING (ICEPT-HDP 2012), 2012, 第 3 作者
(58) Wafer-level chip-to-wafer (C2W) integration of high-sensitivity MEMS and ICs, ICEPT-HDP 2011 PROCEEDINGS - 2011 INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY AND HIGH DENSITY PACKAGING.ICEPT-HDP 2011 PROCEEDINGS - 2011 INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY AND HIGH DENSITY PACKAGING, 2011, 通讯作者
(59) Development of deep reactive ion etching and Cu electroplating of tapered via for 3D integration, ICEPT-HDP 2011 PROCEEDINGS - 2011 INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY AND HIGH DENSITY PACKAGING.ICEPT-HDP 2011 PROCEEDINGS - 2011 INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY AND HIGH DENSITY PACKAGING, 2011, 第 3 作者
(60) Development of Flip-Chip Interconnections of Photodetector Readout Circuit (ROIC), 2010 11TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY & HIGH DENSITY PACKAGING (ICEPT-HDP), 2010, 通讯作者
(61) Development of indium bumping technology through AZ9260 resist electroplating, JOURNAL OF MICROMECHANICS AND MICROENGINEERING, 2010, 第 2 作者
(62) Warpage and Reliability of a 3D-MCM on an Embedded Substrate With Multiple Interconnection Method, IEEE TRANSACTIONS ON COMPONENTS AND PACKAGING TECHNOLOGIES, 2010, 通讯作者
(63) Electroplated indium bump arrays and the bonding reliability, Electroplated indium bump arrays and the bonding reliability, 半导体学报, 2010, 第 2 作者
(64) A wafer-level 3D packaging structure with Benzocyclobutene as a dielectric for multichip module fabrication, A wafer-level 3D packaging structure with Benzocyclobutene as a dielectric for multichip module fabrication, 半导体学报, 2009, 第 3 作者
(65) A wafer-scale packaging structure with monolithic microwave integrated circuits and passives embedded in a silicon substrate for multichip modules for radio frequency applications, JOURNAL OF MICROMECHANICS AND MICROENGINEERING, 2009, 第 3 作者
(66) 基于埋置式基板的三维多芯片组件的翘曲研究, Warpage of Three-Dimensional Multi-Chip Module Based on Embedded Substrate, 电子学报, 2009, 通讯作者
(67) 基于埋置式基板的3D-MCM封装结构的研制, Development of a Three-Dimensional Multichip Module Based on Embedded Substrate, 半导体学报, 2008, 通讯作者
(68) 无线传感网3D-MCM封装结构的设计与实现, Development of 3D multichip module for wireless sensor networks, 功能材料与器件学报, 2008, 通讯作者
(69) 小型平行板散热器阵列的传热特性, The Heat Transfer Behavior of Small-sized Plate-fin Heat Sink Array, 上海交通大学学报, 2007, 通讯作者
(70) 超级计算机机箱的热流场特性研究和优化设计, 机械设计与研究, 2006, 通讯作者
(71) Vacuum packaging process simulation for MEMS devices, PROCEEDINGS OF THE SEVENTH IEEE CPMT CONFERENCE ON HIGH DENSITY MICROSYSTEM DESIGN, PACKAGING AND FAILURE ANALYSIS (HDP'05), 2005, 第 2 作者

科研活动

   
科研项目
( 1 ) 集成电路Cu 布线塑性应变与微结构的关系及其对硅圆片翘曲的影响, 负责人, 地方任务, 2013-07--2016-06
( 2 ) 圆片级封装新型纳米孪晶铜重布线塑性应变机理与晶圆翘曲特性研究, 参与, 国家任务, 2016-01--2019-12
( 3 ) 数字微波芯片及无线传感网微型节点集成技术, 负责人, 国家任务, 2016-01--2020-12
( 4 ) 面向航磁测量的SQUID平面梯度计运动噪声机理研究, 参与, 国家任务, 2018-01--2020-12
( 5 ) 微反射镜阵列单元研制(封装任务), 负责人, 国家任务, 2018-01--2020-12
( 6 ) 低温多芯片混合封装技术, 负责人, 中国科学院计划, 2020-01--2023-12
( 7 ) 整机SiP芯片热应力耦合分析技术, 负责人, 境内委托项目, 2019-05--2021-12
( 8 ) 晶圆级封装及集成技术, 负责人, 国家任务, 2022-12--2025-11
参与会议
(1)Design and Test of Transmission Line in SFQ Circuit   Quan Zhou, Kun Li, Gaowei Xu, Lingyun Li, Le Luo, Jie Ren, Zhen Wang and Xiaoming Xie   2021-08-11
(2)A Novel Bumping Method for Flip-Chip Interconnection   Kun Li, Gaowei Xu, Quan Zhou, Wei Gai, Yanhong Wu, Jie Ren and Zhen Wang   2021-08-11
(3)SFQ电路中的PTL设计和测试   第十六届全国超导薄膜和超导电子器件学术研讨会   2020-11-22
(4)A Novel Superconducting Interconnection for Superconducting MCM Using Wire Bonding Method with Pb-In Alloy   第二十一届电子封装技术国际会议   2020-08-12
(5)In-Sn Bumping Design and Fabrication for High Speed Interconnects of Superconducting MCM via Laser Melting/Jetting and Distribution   Gaowei Xu, Wei Gai, Le Luo, Jie Ren   2019-07-27
(6) Influence of observed anelasticity of Cu on the wafer warpage evolution during thermal processes   2018-08-08
(7)A novel interposer fabrication method for integration of bandpass filter applied in high frequency    2018-08-08
(8)Interconnection Reliability for MCM of Large Micromirror Arrays and High Voltage Driving ASIC Based on High-density Substrate   2018-08-08
(9)Deep understanding the role of Cu in RDL to warpage by exploring the warpage evolution with microstructural changes   2018-05-29
(10)Reduce the wafer warpage introduced by Cu in RDL through adjusting the cooling temperatures   2018-05-29
(11)Influence of packaging effects on the mobile noise of planar SQUID gradiometer for airborne magnetic measurements   2017-08-16
(12)Study of the Wafer Warpage Evolution by Cooling to Extremely Low Temperatures   2017-08-16
(13)Simulation and optimization of X-band microstrip filters based on high-resistance silicon wafer with BCB dielectric and new shielding TSV structure   2017-08-16
(14) A new fabrication method of RF interposer applied in the integration of band pass filter in the frequency range of X band   2017-08-16
(15)Integrated Manufacturing of Microphone-array Node for Wireless Sensor Network (WSN)   2016-08-16
(16)A novel wafer level high Q planar inductor using Ni-Zn ferrite/BCB composite thick film   2016-08-16
(17)The nonlinearity of stress evolution in polymer-metal composite thin films during thermal treatment    2016-05-31
(18)Thermomechanical Behavior of Nanotwinned Copper Interconnection Line In Wafer Level Packaging And The Influence on Wafer Warpage   2015-05-26
(19)Design and Fabrication of Suspended high Q MIM Capacitors by Wafer Level Packaging Technology   2015-05-11